linux-kernel - Re: [PATCH 1/2] regulator: mt6360: Add optional mediatek.power-off-sequence in bindings document

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Message-ID: <20210611201643.GA1583875@robh.at.kernel.org>
Date:   Fri, 11 Jun 2021 14:16:43 -0600
From:   Rob Herring <robh@...nel.org>
To:     cy_huang <u0084500@...il.com>
Cc:     lgirdwood@...il.com, broonie@...nel.org, matthias.bgg@...il.com,
        gene_chen@...htek.com, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
        cy_huang@...htek.com, gene.chen.richtek@...il.com
Subject: Re: [PATCH 1/2] regulator: mt6360: Add optional
 mediatek.power-off-sequence in bindings document

On Wed, Jun 02, 2021 at 02:54:34PM +0800, cy_huang wrote:
> From: ChiYuan Huang <cy_huang@...htek.com>
> 
> Add optional mediatek.power-off-sequence in bindings document.
> 
> Signed-off-by: ChiYuan Huang <cy_huang@...htek.com>
> ---
> Hi,
> 
> Originally, we think it must write in platform dependent code like as bootloader.
> But after the evaluation, it must write only when system normal HALT or POWER_OFF.
> For the other cases, just follow HW immediate off by default.

Wouldn't this be handled by PSCI implementation?

> ---
>  .../devicetree/bindings/regulator/mt6360-regulator.yaml       | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml b/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml
> index a462d99..eaf36e2 100644
> --- a/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml
> +++ b/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml
> @@ -24,6 +24,16 @@ properties:
>    LDO_VIN3-supply:
>      description: Input supply phandle(s) for LDO6/7
>  
> +  mediatek,power-off-sequence:
> +    description: |
> +      Power off sequence time selection for BUCK1/BUCK2/LDO7/LDO6, respetively.
> +      Cause these regulators are all default-on power. Each value from 0 to 63,
> +      and step is 1. Each step means 2 millisecond delay.
> +      Therefore, the power off sequence delay time range is from 0ms to 126ms.
> +    $ref: "/schemas/types.yaml#/definitions/uint8-array"
> +    minItems: 4
> +    maxItems: 4

So this is the delay between BUCK1 and BUCK2, then BUCK2 to LDO7, etcc? 
If we wanted to express this in DT, we'd made this generic which would 
need to be more flexible. A poweroff delay in each regulator (similar to 
the existing power on delay) would be sufficient for what you need I 
think.

Rob