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Message-ID: <20210611213622.n3rlgzwe7c6q7lfu@gupta-dev2.localdomain>
Date: Fri, 11 Jun 2021 14:36:22 -0700
From: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
To: Borislav Petkov <bp@...en8.de>
Cc: Thomas Gleixner <tglx@...utronix.de>,
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Subject: Re: [PATCH 3/4] x86/tsx: Clear CPUID bits when TSX always force
aborts
On 11.06.2021 12:03, Borislav Petkov wrote:
>On Wed, Jun 09, 2021 at 02:13:38PM -0700, Pawan Gupta wrote:
>> @@ -114,6 +127,26 @@ void __init tsx_init(void)
>> tsx_ctrl_state = TSX_CTRL_ENABLE;
>> }
>>
>> + /*
>> + * Hardware will always abort a TSX transaction if both CPUID bits
>> + * RTM_ALWAYS_ABORT and TSX_FORCE_ABORT are enumerated. In this case it
>> + * is better not to enumerate CPUID.RTM and CPUID.HLE bits. Clear them
>> + * here.
>> + */
>> + if (boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT) &&
>> + boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) {
>> + tsx_ctrl_state = TSX_CTRL_RTM_ALWAYS_ABORT;
>> + tsx_clear_cpuid();
>> + setup_clear_cpu_cap(X86_FEATURE_RTM);
>> + setup_clear_cpu_cap(X86_FEATURE_HLE);
>> + return;
>> + }
>
>Why isn't this happening as the first thing on entry in that tsx_init()
>function? IOW, there's no point to noodle through cmdline options etc if
>the hardware will always abort transactions.
Because the next patch is adding tsx=fake cmdline, for that this code
needs to be executed after cmdline parsing. I wanted to avoid the churn
to move this code between patches.
But, I see your comment for 4/4 i.e. tsx=fake may not be needed. It was
added after an internal test failure.
tsx=fake is really for a corner case and if that patch goes away it
would make sense to move the code in question here before cmdline
parsing.
Thanks,
Pawan
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