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Date: Fri, 11 Jun 2021 13:37:52 +0200 From: Alexander Potapenko <glider@...gle.com> To: Liu Shixin <liushixin2@...wei.com> Cc: Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, Marco Elver <elver@...gle.com>, Dmitry Vyukov <dvyukov@...gle.com>, linux-riscv@...ts.infradead.org, LKML <linux-kernel@...r.kernel.org>, kasan-dev <kasan-dev@...glegroups.com> Subject: Re: [PATCH -next] riscv: Enable KFENCE for riscv64 Hi Liu, On Sat, May 29, 2021 at 9:31 AM Liu Shixin <liushixin2@...wei.com> wrote: > > Add architecture specific implementation details for KFENCE and enable > KFENCE for the riscv64 architecture. In particular, this implements the > required interface in <asm/kfence.h>. > > KFENCE requires that attributes for pages from its memory pool can > individually be set. Therefore, force the kfence pool to be mapped at > page granularity. > > Testing this patch using the testcases in kfence_test.c and all passed. > > Signed-off-by: Liu Shixin <liushixin2@...wei.com> Looks like you're missing the Acked-by: that Marco gave here: https://lkml.org/lkml/2021/5/14/588
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