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Message-ID: <58b60b8f-6c86-f44f-38d2-fc260aa59de0@gmail.com>
Date: Sun, 13 Jun 2021 20:46:16 +0100
From: Matthew Hagan <mnhagan88@...il.com>
To: Florian Fainelli <f.fainelli@...il.com>
Cc: Vladimir Oltean <olteanv@...il.com>, Andrew Lunn <andrew@...n.ch>,
Vivek Unune <npcomplete13@...il.com>,
Rob Herring <robh+dt@...nel.org>, Ray Jui <rjui@...adcom.com>,
Scott Branden <sbranden@...adcom.com>,
bcm-kernel-feedback-list@...adcom.com, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/4] ARM: dts: NSP: disable sp804 ccbtimers by default
On 13/06/2021 17:22, Florian Fainelli wrote:
>
> On 6/13/2021 2:46 AM, Matthew Hagan wrote:
>> The sp804 ccbtimers are enabled by default, however they may or may not
>> be present on the board. This patch disables them by default, requiring
>> them to be enabled only where applicable.
> The timers are always part of the SoC, so they should always be enabled,
> and if there was some board specific wiring, in that maybe one of the
> times was fed a different clock source than iprocslow, we could deal
> with that on a per-board basis.
>
> If someone does not want a specific timer to be used, it could be
> unbound once the kernel has booted for instance.
I should have spent more time to look at the issue rather rather than
proposing to disable parts of the SoC.
In my case with ccbtimer0, ccbtimer1 both enabled:
[ 0.000181] clocksource: arm,sp804: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 15290083572 ns
[ 0.000209] Failed to initialize '/axi@...00000/timer@...00': -22
but with ccbtimer0 disabled, ccbtimer1 now initialises correctly:
[ 0.000186] clocksource: arm,sp804: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 15290083572 ns
Will investigate this further, but yes this patch should be dropped.
Thanks,
Matthew
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