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Date: Sun, 13 Jun 2021 11:23:04 +0200
From: Jonathan Neuschäfer <j.neuschaefer@....net>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Jonathan Neuschäfer <j.neuschaefer@....net>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, Rob Herring <robh+dt@...nel.org>,
OpenBMC Maillist <openbmc@...ts.ozlabs.org>,
Tomer Maimon <tmaimon77@...il.com>,
Joel Stanley <joel@....id.au>,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/8] ARM: dts: wpcm450: Add global control registers
(GCR) node
On Fri, Jun 04, 2021 at 10:01:07AM +0200, Linus Walleij wrote:
> On Wed, Jun 2, 2021 at 2:04 PM Jonathan Neuschäfer
> <j.neuschaefer@....net> wrote:
>
> > The Global Control Registers (GCR) are a block of registers in Nuvoton
> > SoCs that expose misc functionality such as chip model and version
> > information or pinmux settings.
> >
> > This patch adds a GCR node to nuvoton-wpcm450.dtsi in preparation for
> > enabling pinctrl on this SoC.
> >
> > Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@....net>
>
> As noted I would name this architecture-neutral with
> syscon@...
Will do.
Jonathan Neuschäfer
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