[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <e4d410f786946280ced02dd07c74e0a74f1d10cb.1623704845.git-series.pawan.kumar.gupta@linux.intel.com>
Date: Mon, 14 Jun 2021 14:13:23 -0700
From: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
To: Thomas Gleixner <tglx@...utronix.de>,
Borislav Petkov <bp@...en8.de>
Cc: Jonathan Corbet <corbet@....net>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...hat.com>,
Namhyung Kim <namhyung@...nel.org>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>,
"Paul E. McKenney" <paulmck@...nel.org>,
Randy Dunlap <rdunlap@...radead.org>,
Andrew Morton <akpm@...ux-foundation.org>,
"Maciej W. Rozycki" <macro@...am.me.uk>,
Viresh Kumar <viresh.kumar@...aro.org>,
Vlastimil Babka <vbabka@...e.cz>,
Tony Luck <tony.luck@...el.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <seanjc@...gle.com>,
Kyung Min Park <kyung.min.park@...el.com>,
Fenghua Yu <fenghua.yu@...el.com>,
Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
Tom Lendacky <thomas.lendacky@....com>,
Juergen Gross <jgross@...e.com>,
Krish Sadhukhan <krish.sadhukhan@...cle.com>,
Kan Liang <kan.liang@...ux.intel.com>,
Joerg Roedel <jroedel@...e.de>,
Victor Ding <victording@...gle.com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
Brijesh Singh <brijesh.singh@....com>,
Dave Hansen <dave.hansen@...el.com>,
Mike Rapoport <rppt@...nel.org>,
Anthony Steinhauser <asteinhauser@...gle.com>,
Anand K Mistry <amistry@...gle.com>,
Andi Kleen <ak@...ux.intel.com>,
Miguel Ojeda <ojeda@...nel.org>, Joe Perches <joe@...ches.com>,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org
Subject: [PATCH v2 2/3] perf/x86/intel: Do not deploy workaround when TSX is
deprecated
Earlier workaround added by commit 400816f60c54 ("perf/x86/intel:
Implement support for TSX Force Abort") for perf counter interactions
[1] are not required on some client systems which received a microcode
update that deprecates TSX.
Bypass the perf workaround when such microcode is enumerated.
[1] Performance Monitoring Impact of IntelĀ® Transactional Synchronization Extension Memory
http://cdrdv2.intel.com/v1/dl/getContent/604224 (Document ID 604224)
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
Reviewed-by: Andi Kleen <ak@...ux.intel.com>
Reviewed-by: Tony Luck <tony.luck@...el.com>
Tested-by: Neelima Krishnan <neelima.krishnan@...el.com>
---
arch/x86/events/intel/core.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index e28892270c58..b599a30fcc7d 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6015,7 +6015,15 @@ __init int intel_pmu_init(void)
tsx_attr = hsw_tsx_events_attrs;
intel_pmu_pebs_data_source_skl(pmem);
- if (boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) {
+ /* Processors with CPUID.RTM_ALWAYS_ABORT have TSX deprecated by
+ * default. TSX force abort hooks are not required on these
+ * systems.
+ *
+ * Only deploy the workaround when older microcode is detected
+ * i.e. !X86_FEATURE_RTM_ALWAYS_ABORT.
+ */
+ if (boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT) &&
+ !boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT)) {
x86_pmu.flags |= PMU_FL_TFA;
x86_pmu.get_event_constraints = tfa_get_event_constraints;
x86_pmu.enable_all = intel_tfa_pmu_enable_all;
--
git-series 0.9.1
Powered by blists - more mailing lists