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Message-ID: <CAH=2Ntwkk4Hw1VQcXu9y08jPHWf99EFmj=7GG0V4uuwbNK7c0A@mail.gmail.com>
Date: Mon, 14 Jun 2021 14:00:01 +0530
From: Bhupesh Sharma <bhupesh.sharma@...aro.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: linux-arm-msm@...r.kernel.org,
Linus Walleij <linus.walleij@...aro.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>, Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Andy Gross <agross@...nel.org>,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
bhupesh.linux@...il.com
Subject: Re: [PATCH 5/8] pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for
pmic-gpios on SA8155p-adp
Hi Bjorn,
On Fri, 11 Jun 2021 at 08:30, Bjorn Andersson
<bjorn.andersson@...aro.org> wrote:
>
> On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
>
> > SA8155p-adp PMICs (PMM8155AU_1 and PMM8155AU_2) expose
> > the following PMIC GPIO blocks:
> >
> > - PMM8155AU_1: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7 and gpio8)
> > - PMM8155AU_2: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7)
> >
> > Add support for the same in the pinctrl driver.
> >
> > Cc: Linus Walleij <linus.walleij@...aro.org>
> > Cc: Liam Girdwood <lgirdwood@...il.com>
> > Cc: Mark Brown <broonie@...nel.org>
> > Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
> > Cc: Vinod Koul <vkoul@...nel.org>
> > Cc: Rob Herring <robh+dt@...nel.org>
> > Cc: Andy Gross <agross@...nel.org>
> > Cc: devicetree@...r.kernel.org
> > Cc: linux-kernel@...r.kernel.org
> > Cc: linux-gpio@...r.kernel.org
> > Cc: bhupesh.linux@...il.com
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
> > ---
> > drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > index 00870da0c94e..890c44b6e198 100644
> > --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > @@ -1127,6 +1127,10 @@ static const struct of_device_id pmic_gpio_of_match[] = {
> > { .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 },
> > /* pm8150l has 12 GPIOs with holes on 7 */
> > { .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 },
> > + /* pmm8155au-1 has 10 GPIOs with holes on 2, 5, 7 and 8 */
> > + { .compatible = "qcom,pmm8155au-1-gpio", .data = (void *) 10 },
>
> As noted in the binding, I think this should be "qcom,pmm8155au-gpio"
> and please skip the comment about the holes.
Similar to what I noted in the binding patch review thread, the pmic
gpio holes seem different as per the downstream dtsi.
So, please let me know and if required, I can make the suggested change in v2.
Thanks,
Bhupesh
> > + /* pmm8155au-2 has 10 GPIOs with holes on 2, 5 and 7 */
> > + { .compatible = "qcom,pmm8155au-2-gpio", .data = (void *) 10 },
> > { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 },
> > { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 },
> > { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 },
> > --
> > 2.31.1
> >
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