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Message-ID: <8206a84c-b5d8-4428-6501-7e114798b1bb@ti.com>
Date: Tue, 15 Jun 2021 13:48:14 -0500
From: Suman Anna <s-anna@...com>
To: Aswath Govindraju <a-govindraju@...com>
CC: Vignesh Raghavendra <vigneshr@...com>,
Lokesh Vutla <lokeshvutla@...com>,
Kishon Vijay Abraham I <kishon@...com>,
Nishanth Menon <nm@...com>, Tero Kristo <kristo@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 2/3] arm64: dts: ti: k3-am64-main: Reserve OCMRAM for
DMSC-lite and secure proxy communication
On 6/15/21 12:43 PM, Aswath Govindraju wrote:
> The final 128KB in SRAM is reserved by default for DMSC-lite code and
> secure proxy communication buffer. The memory region used for DMSC-lite
> code can be optionally freed up by secure firmware API[1]. However, the
> buffer for secure proxy communication is not configurable. This default
> hardware configuration is unique for AM64.
>
> Therefore, indicate the area reserved for DMSC-lite code and secure proxy
> communication buffer in the oc_sram device tree node.
>
> [1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover
>
> Signed-off-by: Aswath Govindraju <a-govindraju@...com>
Reviewed-by: Suman Anna <s-anna@...com>
> ---
> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> index 693fe24e7f7a..6a883f4349cb 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> @@ -27,6 +27,14 @@
> tfa-sram@0 {
> reg = <0x0 0x1c000>;
> };
> +
> + dmsc-sram@...000 {
> + reg = <0x1e0000 0x1c000>;
> + };
> +
> + sproxy-sram@...000 {
> + reg = <0x1fc000 0x4000>;
> + };
> };
>
> main_conf: syscon@...00000 {
>
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