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Date:   Tue, 15 Jun 2021 13:18:33 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Bin Meng' <bmeng.cn@...il.com>
CC:     Matteo Croce <mcroce@...ux.microsoft.com>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Atish Patra <atish.patra@....com>,
        "Emil Renner Berthing" <kernel@...il.dk>,
        Akira Tsukamoto <akira.tsukamoto@...il.com>,
        "Drew Fustini" <drew@...gleboard.org>
Subject: RE: [PATCH 1/3] riscv: optimized memcpy

From: Bin Meng
> Sent: 15 June 2021 14:09
> 
> On Tue, Jun 15, 2021 at 4:57 PM David Laight <David.Laight@...lab.com> wrote:
> >
...
> > I'm surprised that the C loop:
> >
> > > +             for (; count >= bytes_long; count -= bytes_long)
> > > +                     *d.ulong++ = *s.ulong++;
> >
> > ends up being faster than the ASM 'read lots' - 'write lots' loop.
> 
> I believe that's because the assembly version has some unaligned
> access cases, which end up being trap-n-emulated in the OpenSBI
> firmware, and that is a big overhead.

Ah, that would make sense since the asm user copy code
was broken for misaligned copies.
I suspect memcpy() was broken the same way.

I'm surprised IP_NET_ALIGN isn't set to 2 to try to
avoid all these misaligned copies in the network stack.
Although avoiding 8n+4 aligned data is rather harder.

Misaligned copies are just best avoided - really even on x86.
The 'real fun' is when the access crosses TLB boundaries.

	David

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