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Message-Id: <20210616195239.1627552-1-srinivas.pandruvada@linux.intel.com>
Date: Wed, 16 Jun 2021 12:52:39 -0700
From: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
To: rjw@...ysocki.net
Cc: linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Subject: [PATCH -next] Revert "ACPI: DPTF: Add new PCH FIVR methods"
This reverts commit bab858b30cbe5619038dd68ab89be469fff9861e.
Some user reported issues with this change. Will resubmit for 5.15 cycle.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
---
Documentation/ABI/testing/sysfs-platform-dptf | 42 -------------------
drivers/acpi/dptf/dptf_pch_fivr.c | 9 ----
2 files changed, 51 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-platform-dptf b/Documentation/ABI/testing/sysfs-platform-dptf
index bce1b745fc56..141834342a4d 100644
--- a/Documentation/ABI/testing/sysfs-platform-dptf
+++ b/Documentation/ABI/testing/sysfs-platform-dptf
@@ -111,45 +111,3 @@ Contact: linux-acpi@...r.kernel.org
Description:
(RW) The PCH FIVR (Fully Integrated Voltage Regulator) switching frequency in MHz,
when FIVR clock is 38.4MHz.
-
-What: /sys/bus/platform/devices/INTC1045:00/pch_fivr_switch_frequency/fivr_switching_freq_mhz
-Date: June, 2021
-KernelVersion: v5.14
-Contact: linux-acpi@...r.kernel.org
-Description:
- (RO) PCH FIVR switching control frequency in the units of
- XTAL_FREQ / 128, where XTAL_FREQ is the (product specific)
- Crystal Oscillator frequency.
-
-What: /sys/bus/platform/devices/INTC1045:00/pch_fivr_switch_frequency/fivr_switching_fault_status
-Date: June, 2021
-KernelVersion: v5.14
-Contact: linux-acpi@...r.kernel.org
-Description:
- (RO) Read the FIVR switching frequency control fault status.
-
-What: /sys/bus/platform/devices/INTC1045:00/pch_fivr_switch_frequency/ssc_clock_info
-Date: June, 2021
-KernelVersion: v5.14
-Contact: linux-acpi@...r.kernel.org
-Description:
- (RO) Presents SSC (spread spectrum clock) information for EMI
- (Electro magnetic interference) control. This is a bit mask.
- Bits Description
- [7:0] Sets clock spectrum spread percentage:
- 0x00=0.2% , 0x3F=10%
- 1 LSB = 0.1% increase in spread (for
- settings 0x01 thru 0x1C)
- 1 LSB = 0.2% increase in spread (for
- settings 0x1E thru 0x3F)
- [8] When set to 1, enables spread
- spectrum clock
- [9] 0: Triangle mode. FFC frequency
- walks around the Fcenter in a linear
- fashion
- 1: Random walk mode. FFC frequency
- changes randomly within the SSC
- (Spread spectrum clock) range
- [10] 0: No white noise. 1: Add white noise
- to spread waveform
- [11] When 1, future writes are ignored.
diff --git a/drivers/acpi/dptf/dptf_pch_fivr.c b/drivers/acpi/dptf/dptf_pch_fivr.c
index 22c4ae0401ef..5fca18296bf6 100644
--- a/drivers/acpi/dptf/dptf_pch_fivr.c
+++ b/drivers/acpi/dptf/dptf_pch_fivr.c
@@ -55,24 +55,15 @@ static ssize_t name##_store(struct device *dev,\
PCH_FIVR_SHOW(freq_mhz_low_clock, GFC0)
PCH_FIVR_SHOW(freq_mhz_high_clock, GFC1)
-PCH_FIVR_SHOW(ssc_clock_info, GEMI)
-PCH_FIVR_SHOW(fivr_switching_freq_mhz, GFCS)
-PCH_FIVR_SHOW(fivr_switching_fault_status, GFFS)
PCH_FIVR_STORE(freq_mhz_low_clock, RFC0)
PCH_FIVR_STORE(freq_mhz_high_clock, RFC1)
static DEVICE_ATTR_RW(freq_mhz_low_clock);
static DEVICE_ATTR_RW(freq_mhz_high_clock);
-static DEVICE_ATTR_RO(ssc_clock_info);
-static DEVICE_ATTR_RO(fivr_switching_freq_mhz);
-static DEVICE_ATTR_RO(fivr_switching_fault_status);
static struct attribute *fivr_attrs[] = {
&dev_attr_freq_mhz_low_clock.attr,
&dev_attr_freq_mhz_high_clock.attr,
- &dev_attr_ssc_clock_info.attr,
- &dev_attr_fivr_switching_freq_mhz.attr,
- &dev_attr_fivr_switching_fault_status.attr,
NULL
};
--
2.30.2
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