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Message-Id: <20210616060251.398444-2-bmeng.cn@gmail.com>
Date: Wed, 16 Jun 2021 14:02:51 +0800
From: Bin Meng <bmeng.cn@...il.com>
To: Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Atish Patra <atish.patra@....com>,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Cc: Bin Meng <bin.meng@...driver.com>
Subject: [PATCH 2/2] riscv: dts: microchip: Fix wrong interrupt numbers of DMA
From: Bin Meng <bin.meng@...driver.com>
Per chapter 5.2.2, interrupt sources in the PolarFire MSS doc [1],
the correct interrupt numbers for DMA are <5,6,...,12>.
[1] https://www.microsemi.com/document-portal/doc_download/
1245725-polarfire-soc-fpga-mss-technical-reference-manual
Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board")
Signed-off-by: Bin Meng <bin.meng@...driver.com>
---
arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
index ee54878b3f89..a00d9dc560d3 100644
--- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
@@ -182,7 +182,7 @@ dma@...0000 {
compatible = "sifive,fu540-c000-pdma";
reg = <0x0 0x3000000 0x0 0x8000>;
interrupt-parent = <&plic>;
- interrupts = <23 24 25 26 27 28 29 30>;
+ interrupts = <5 6 7 8 9 10 11 12>;
#dma-cells = <1>;
};
--
2.25.1
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