lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 16 Jun 2021 21:53:45 +0900
From:   Punit Agrawal <punitagrawal@...il.com>
To:     Rob Herring <robh+dt@...nel.org>
Cc:     Bjorn Helgaas <helgaas@...nel.org>, Marc Zyngier <maz@...nel.org>,
        Leonardo Bras <leobras.c@...il.com>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        PCI <linux-pci@...r.kernel.org>,
        Alexandru Elisei <alexandru.elisei@....com>, wqu@...e.com,
        Robin Murphy <robin.murphy@....com>,
        Peter Geis <pgwipeout@...il.com>,
        Ard Biesheuvel <ardb@...nel.org>,
        Brian Norris <briannorris@...omium.org>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: [PATCH v4] PCI: of: Clear 64-bit flag for non-prefetchable
 memory below 4GB

Hi Rob,

Rob Herring <robh+dt@...nel.org> writes:

> On Mon, Jun 14, 2021 at 5:05 PM Punit Agrawal <punitagrawal@...il.com> wrote:
>>
>> Alexandru and Qu reported this resource allocation failure on
>> ROCKPro64 v2 and ROCK Pi 4B, both based on the RK3399:
>>
>>   pci_bus 0000:00: root bus resource [mem 0xfa000000-0xfbdfffff 64bit]
>>   pci 0000:00:00.0: PCI bridge to [bus 01]
>>   pci 0000:00:00.0: BAR 14: no space for [mem size 0x00100000]
>>   pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit]
>>
>> "BAR 14" is the PCI bridge's 32-bit non-prefetchable window, and our
>> PCI allocation code isn't smart enough to allocate it in a host
>> bridge window marked as 64-bit, even though this should work fine.
>>
>> A DT host bridge description includes the windows from the CPU
>> address space to the PCI bus space.  On a few architectures
>> (microblaze, powerpc, sparc), the DT may also describe PCI devices
>> themselves, including their BARs.
>>
>> Before 9d57e61bf723 ("of/pci: Add IORESOURCE_MEM_64 to resource
>> flags for 64-bit memory addresses"), of_bus_pci_get_flags() ignored
>> the fact that some DT addresses described 64-bit windows and BARs.
>> That was a problem because the virtio virtual NIC has a 32-bit BAR
>> and a 64-bit BAR, and the driver couldn't distinguish them.
>>
>> 9d57e61bf723 set IORESOURCE_MEM_64 for those 64-bit DT ranges, which
>> fixed the virtio driver.  But it also set IORESOURCE_MEM_64 for host
>> bridge windows, which exposed the fact that the PCI allocator isn't
>> smart enough to put 32-bit resources in those 64-bit windows.
>>
>> Clear IORESOURCE_MEM_64 from host bridge windows since we don't need
>> that information.
>>
>> Fixes: 9d57e61bf723 ("of/pci: Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses")
>> Reported-at: https://lore.kernel.org/lkml/7a1e2ebc-f7d8-8431-d844-41a9c36a8911@arm.com/
>> Reported-by: Alexandru Elisei <alexandru.elisei@....com>
>> Reported-by: Qu Wenruo <wqu@...e.com>
>> Suggested-by: Bjorn Helgaas <bhelgaas@...gle.com>
>> Signed-off-by: Punit Agrawal <punitagrawal@...il.com>
>> Cc: Bjorn Helgaas <bhelgaas@...gle.com>
>> Cc: Rob Herring <robh+dt@...nel.org>
>
> I think we've beat this one to death.
>
> Reviewed-by: Rob Herring <robh@...nel.org>

Thanks for taking a look. Hopefully everybody is happy with this
version and the patch can get merged soon.

I assume Bjorn will pick this up as a fix with Alex's Tested-by tag. Let
me know if any other steps are needed.

Thanks,
Punit

[...]

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ