lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 18 Jun 2021 13:00:47 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Jamin Lin <jamin_lin@...eedtech.com>
Cc:     Rob Herring <robh+dt@...nel.org>, Joel Stanley <joel@....id.au>,
        Andrew Jeffery <andrew@...id.au>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Wolfram Sang <wsa+renesas@...g-engineering.com>,
        Arnd Bergmann <arnd@...db.de>, Jean Delvare <jdelvare@...e.de>,
        Jarkko Nikula <jarkko.nikula@...ux.intel.com>,
        Khalil Blaiech <kblaiech@...lanox.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Bence Csókás <bence98@....bme.hu>,
        Yicong Yang <yangyicong@...ilicon.com>,
        Mike Rapoport <rppt@...nel.org>,
        Uwe Kleine-König 
        <u.kleine-koenig@...gutronix.de>,
        Ryan Chen <ryan_chen@...eedtech.com>,
        "open list:I2C SUBSYSTEM HOST DRIVERS" <linux-i2c@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        "moderated list:ARM/ASPEED MACHINE SUPPORT" 
        <linux-arm-kernel@...ts.infradead.org>,
        "moderated list:ARM/ASPEED MACHINE SUPPORT" 
        <linux-aspeed@...ts.ozlabs.org>,
        open list <linux-kernel@...r.kernel.org>,
        ChiaWei Wang <chiawei_wang@...eedtech.com>,
        Troy Lee <troy_lee@...eedtech.com>,
        Steven Lee <steven_lee@...eedtech.com>
Subject: Re: [PATCH 3/3] i2c:support new register set for ast2600

On Fri, Jun 18, 2021 at 11:58:55AM +0800, Jamin Lin wrote:
> The 06/17/2021 10:36, Andy Shevchenko wrote:
> > On Thu, Jun 17, 2021 at 05:43:40PM +0800, Jamin Lin wrote:
> > > Add i2c new driver to support new register set for AST2600.
> > > AST2600 support three modes for data transfer which are
> > > byte mode, buffer mode and dma mode, respectively.
> > > The global driver of i2c is used to set the new register
> > > mode and define the base clock frequency
> > > of baseclk_1~baseclk_4.

> >  - shrink the code base by at least ~15% (it's possible), i.e. -200 LOCs
> Can you describe it more detail?
> Do you mean I should separate the patch file to fix size limitation? 

No. Based on my brief review you introduce to many redundant LOCs (lines of
code). Remove them, refactor the code, make it small and neat and easy to read
and understand. It is possible to achieve!

> >  - rethink how you do calculations and bit operations
> >  - better code style
> >
> Thanks for your review and very good suggestion
> I will update them and sent patch again.
> By the way, I received test failed email from Robot due to compiling
> warning. I will fix them, too.

-- 
With Best Regards,
Andy Shevchenko


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ