[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20210621072424.111733-4-jagan@amarulasolutions.com>
Date: Mon, 21 Jun 2021 12:54:18 +0530
From: Jagan Teki <jagan@...rulasolutions.com>
To: Peng Fan <peng.fan@....com>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Tomasz Figa <t.figa@...sung.com>,
Fancy Fang <chen.fang@....com>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
dri-devel@...ts.freedesktop.org, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, NXP Linux Team <linux-imx@....com>,
linux-amarula@...rulasolutions.com,
Anthony Brandon <anthony@...rulasolutions.com>,
Francis Laniel <francis.laniel@...rulasolutions.com>,
Matteo Lisi <matteo.lisi@...icam.com>,
Milco Pratesi <milco.pratesi@...icam.com>,
Jagan Teki <jagan@...rulasolutions.com>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>, Rob Herring <robh+dt@...nel.org>
Subject: [RFC PATCH 3/9] dt-bindings: phy: Add SEC DSIM DPHY bindings
Samsung SEC MIPI DSIM DPHY controller is part of registers
available in SEC MIPI DSIM bridge for NXP's i.MX8M Mini and
Nano Processors.
Add dt-bingings for it.
Cc: Kishon Vijay Abraham I <kishon@...com>
Cc: Vinod Koul <vkoul@...nel.org>
Cc: Rob Herring <robh+dt@...nel.org>
Signed-off-by: Jagan Teki <jagan@...rulasolutions.com>
---
.../bindings/phy/samsung,sec-dsim-dphy.yaml | 56 +++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/samsung,sec-dsim-dphy.yaml
diff --git a/Documentation/devicetree/bindings/phy/samsung,sec-dsim-dphy.yaml b/Documentation/devicetree/bindings/phy/samsung,sec-dsim-dphy.yaml
new file mode 100644
index 000000000000..c5770c8035e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/samsung,sec-dsim-dphy.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/samsung,sec-dsim-dphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung SEC MIPI DSIM DPHY controller on i.MX8M Mini and Nano SoCs
+
+maintainers:
+ - Jagan Teki <jagan@...rulasolutions.com>
+
+properties:
+ "#phy-cells":
+ const: 0
+
+ compatible:
+ enum:
+ - fsl,imx8mm-sec-dsim-dphy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Phy Ref Clock
+
+ clock-names:
+ items:
+ - const: phy_ref
+
+ power-domains:
+ maxItems: 1
+ description: phandle to the associated power domain
+
+required:
+ - "#phy-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx8mm-clock.h>
+ #include <dt-bindings/power/imx8mm-power.h>
+
+ dphy: dphy@...100a4 {
+ compatible = "fsl,imx8mm-sec-dsim-dphy";
+ reg = <0x32e100a4 0xbc>;
+ clocks = <&clk IMX8MM_CLK_DSI_PHY_REF>;
+ clock-names = "phy_ref";
+ power-domains = <&dispmix_blk_ctl IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DPHY>;
+ #phy-cells = <0>;
+ };
--
2.25.1
Powered by blists - more mailing lists