[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <DB6PR0402MB27600C3D228997E89D1DFA2688099@DB6PR0402MB2760.eurprd04.prod.outlook.com>
Date: Tue, 22 Jun 2021 01:04:00 +0000
From: Peng Fan <peng.fan@....com>
To: "Peng Fan (OSS)" <peng.fan@....nxp.com>,
"jassisinghbrar@...il.com" <jassisinghbrar@...il.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"o.rempel@...gutronix.de" <o.rempel@...gutronix.de>
CC: "kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
Aisheng Dong <aisheng.dong@....com>,
dl-linux-imx <linux-imx@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH V2 0/4] mailbox: imx: add i.MX8ULP MU support
> Subject: [PATCH V2 0/4] mailbox: imx: add i.MX8ULP MU support
Gentle ping..
Thanks,
Peng.
>
> From: Peng Fan <peng.fan@....com>
>
> V2:
> Add A-b from Rob in patch 1
> Fix RXDB for i.MX8ULP in patch 4
>
> i.MX8ULP generic MU is a different IP compared with previous i.MX chips.
> It has different register layout and bit position, but the register name and bit
> definitions are almost same with previous i.MX MU.
>
> So we extend the current imx-mailbox driver to support i.MX8ULP.
>
> Peng Fan (4):
> dt-bindings: mailbox: imx-mu: add i.MX8ULP MU support
> mailbox: imx: replace the xTR/xRR array with single register
> mailbox: imx: add xSR/xCR register array
> mailbox: imx-mailbox: support i.MX8ULP MU
>
> .../devicetree/bindings/mailbox/fsl,mu.yaml | 1 +
> drivers/mailbox/imx-mailbox.c | 196
> +++++++++++-------
> 2 files changed, 123 insertions(+), 74 deletions(-)
>
> --
> 2.30.0
Powered by blists - more mailing lists