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Message-Id: <1624377338-75384-1-git-send-email-zhouyanjie@wanyeetech.com>
Date: Tue, 22 Jun 2021 23:55:35 +0800
From: 周琰杰 (Zhou Yanjie)
<zhouyanjie@...yeetech.com>
To: tsbogend@...ha.franken.de, paul@...pouillou.net, robh+dt@...nel.org
Cc: linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, dongsheng.qiu@...enic.com,
aric.pzqi@...enic.com, rick.tyliu@...enic.com,
sihui.liu@...enic.com, jun.jiang@...enic.com,
sernia.zhou@...mail.com
Subject: [PATCH v2 0/3] Misc Ingenic patches.
Some misc patches that don't really have any relation
between themselves.
周琰杰 (Zhou Yanjie) (3):
MIPS: X1830: Respect cell count of common properties.
MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
MIPS: CI20: Add second percpu timer for SMP.
arch/mips/boot/dts/ingenic/ci20.dts | 21 +++++++++++----------
arch/mips/boot/dts/ingenic/x1000.dtsi | 7 +++++++
arch/mips/boot/dts/ingenic/x1830.dtsi | 16 +++++++++++-----
3 files changed, 29 insertions(+), 15 deletions(-)
--
2.7.4
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