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Date:   Fri, 25 Jun 2021 11:22:31 +0200
From:   Daniel Golle <daniel@...rotopia.org>
To:     Frank Wunderlich <frank-w@...lic-files.de>
Cc:     Eric Woudstra <ericwouds@...il.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Sean Wang <sean.wang@...iatek.com>,
        Ryder Lee <ryder.lee@...iatek.com>
Subject: Re: Re: [PATCH] Fix mt7622.dtsi thermal cpu

On Fri, Jun 25, 2021 at 10:16:43AM +0200, Frank Wunderlich wrote:
> Hi,
> 
> > Gesendet: Donnerstag, 24. Juni 2021 um 15:29 Uhr
> > Von: "Eric Woudstra" <ericwouds@...il.com>
> > The SOC runs unthrotlled slowly to 80 degrees. This takes minutes. Polling interval 1 second or less does not matter much when looking at these temperature rise times 
> > 
> > After that in more then an hour it slowly creeps up to 85. I believe the design is so that the SOC, under normal circumstances, can run at 1.35 GHz without throttling frequency, without heatsink. It just needs a safeguard for different circumstances.
> > 
> > Most of these SOCs can also run in industrial grade circumstances, which means up to 85 degrees ambient temperature already . If not industrial then this would be 60 degrees ambient already 
> > 
> > But only someone at Mediatek can confirm this 
> 
> maybe Matthias knows anybody?
> get_maintainers-script shows no mtk employee for mtk_thermal driver, added Sean and Ryder as common Linux-Contacts...
> 
> Daniel from openwrt have some other mt7622 Boards maybe he can test the Fan approach below

I got Linksys E8450 aka. Belkin RT3200 ( https://fcc.io/K7S-03571 ) as
well as Ubiquiti UniFi 6 LR ( https://fcc.io/SWX-U6LR ). Both got quite
massive customized heatsinks (see internal photos on FCC submission),
which results in much better heat dissipation than just having the
naked chip like on the BPi-R64.
Hence I also can't test the fan approach on boards other than the R64.


> 
> > On Jun 24, 2021, 12:21 PM, at 12:21 PM, Daniel Lezcano <daniel.lezcano@...aro.org> wrote:
> > >Found that:
> > >
> > >https://download.kamami.pl/p579344-MT7622A_Datasheet_for_BananaPi_Only%281%29.pdf
> > >
> > >Chapter 3.3 - Thermal Characteristics
> > >
> > >Given the values I suggest:
> > >
> > > - Passive - 80°C
> > >
> > > - Hot - 90°C
> > >
> > > - Critical - 100°C
> 
> maybe adding FAN (r64, don't know for other mt7622 boards) for lower 2 trips (with adjusted temperature points) and cpu-throtteling for upper 2 trips
> 
> something like this (used the 70/80 trip points discussed before):
> 
> --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> @@ -134,6 +134,13 @@
>  		};
>  	};
>  
> +	fan0: pwm-fan {
> +		compatible = "pwm-fan";
> +		#cooling-cells = <2>;
> +		pwms = <&pwm 2 10000 0>;
> +		cooling-levels = <0 102 170 230>;
> +	};
> +
>  	thermal-zones {
>  		cpu_thermal: cpu-thermal {
>  			polling-delay-passive = <1000>;
> @@ -143,13 +150,13 @@
>  
>  			trips {
>  				cpu_passive: cpu-passive {
> -					temperature = <47000>;
> +					temperature = <70000>;
>  					hysteresis = <2000>;
>  					type = "passive";
>  				};
>  
>  				cpu_active: cpu-active {
> -					temperature = <67000>;
> +					temperature = <80000>;
>  					hysteresis = <2000>;
>  					type = "active";
>  				};
> @@ -170,14 +177,12 @@
>  			cooling-maps {
>  				map0 {
>  					trip = <&cpu_passive>;
> -					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> -							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +					cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>  				};
>  
>  				map1 {
>  					trip = <&cpu_active>;
> -					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> -							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +					cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>  				};
>  
>  				map2 {
> @@ -428,6 +433,7 @@
>  	pwm: pwm@...06000 {
>  		compatible = "mediatek,mt7622-pwm";
>  		reg = <0 0x11006000 0 0x1000>;
> +		#pwm-cells = <3>;
>  		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
>  		clocks = <&topckgen CLK_TOP_PWM_SEL>,
>  			 <&pericfg CLK_PERI_PWM_PD>,
> 
> 
> regards Frank

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