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Message-ID: <20210626102806.15402-11-raviteja.narayanam@xilinx.com>
Date: Sat, 26 Jun 2021 15:58:06 +0530
From: Raviteja Narayanam <raviteja.narayanam@...inx.com>
To: <linux-i2c@...r.kernel.org>, <michal.simek@...inx.com>
CC: <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <git@...inx.com>, <marex@...x.de>,
<joe@...ches.com>,
Raviteja Narayanam <raviteja.narayanam@...inx.com>
Subject: [PATCH v2 10/10] i2c: xiic: Add smbus_block_read functionality
smbus_block_read is added to xiic driver to read from few sensors
which support this command. Since the number of bytes to read is not
known prior to transfer, we are using xiic standard mode for low level
control of IP.
Signed-off-by: Raviteja Narayanam <raviteja.narayanam@...inx.com>
---
drivers/i2c/busses/i2c-xiic.c | 80 ++++++++++++++++++++++++++++++++---
1 file changed, 74 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index 26fc174b8e95..931b9bce87fe 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -65,6 +65,7 @@ enum xiic_endian {
* @dynamic: Mode of controller
* @prev_msg_tx: Previous message is Tx
* @quirks: To hold platform specific bug info
+ * @smbus_block_read: Flag to handle block read
*/
struct xiic_i2c {
struct device *dev;
@@ -84,6 +85,7 @@ struct xiic_i2c {
bool dynamic;
bool prev_msg_tx;
u32 quirks;
+ bool smbus_block_read;
};
struct xiic_version_data {
@@ -344,6 +346,54 @@ static void xiic_deinit(struct xiic_i2c *i2c)
xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, cr & ~XIIC_CR_ENABLE_DEVICE_MASK);
}
+static void xiic_smbus_block_read_setup(struct xiic_i2c *i2c)
+{
+ u8 rxmsg_len;
+ u8 rfd_set = 0;
+
+ /*
+ * Clear the I2C_M_RECV_LEN flag to avoid setting
+ * message length again
+ */
+ i2c->rx_msg->flags &= ~I2C_M_RECV_LEN;
+
+ /* Set smbus_block_read flag to identify in isr */
+ i2c->smbus_block_read = true;
+
+ /* Read byte from rx fifo and set message length */
+ rxmsg_len = xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET);
+
+ i2c->rx_msg->buf[i2c->rx_pos++] = rxmsg_len;
+
+ /* Check if received length is valid */
+ if (rxmsg_len <= I2C_SMBUS_BLOCK_MAX) {
+ /* Set Receive fifo depth */
+ if (rxmsg_len > IIC_RX_FIFO_DEPTH) {
+ rfd_set = IIC_RX_FIFO_DEPTH - 1;
+ i2c->rx_msg->len = rxmsg_len + 1;
+ } else if ((rxmsg_len == 1) ||
+ (rxmsg_len == 0)) {
+ /*
+ * Minimum of 3 bytes required to exit cleanly. 1 byte
+ * already received, Second byte is being received. Have
+ * to set NACK in read_rx before receiving the last byte
+ */
+ i2c->rx_msg->len = 3;
+ } else {
+ rfd_set = rxmsg_len - 2;
+ i2c->rx_msg->len = rxmsg_len + 1;
+ }
+ xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, rfd_set);
+
+ return;
+ }
+
+ /* Invalid message length, trigger STATE_ERROR with tx_msg_len in ISR */
+ i2c->tx_msg->len = 3;
+ i2c->smbus_block_read = false;
+ dev_err(i2c->adap.dev.parent, "smbus_block_read Invalid msg length\n");
+}
+
static void xiic_read_rx(struct xiic_i2c *i2c)
{
u8 bytes_in_fifo, cr = 0, bytes_to_read = 0;
@@ -366,6 +416,12 @@ static void xiic_read_rx(struct xiic_i2c *i2c)
if (!i2c->dynamic) {
bytes_rem = xiic_rx_space(i2c) - bytes_in_fifo;
+ /* Set msg length if smbus_block_read */
+ if (i2c->rx_msg->flags & I2C_M_RECV_LEN) {
+ xiic_smbus_block_read_setup(i2c);
+ return;
+ }
+
if (bytes_rem > IIC_RX_FIFO_DEPTH) {
bytes_to_read = bytes_in_fifo;
} else if (bytes_rem > 1) {
@@ -638,6 +694,12 @@ static irqreturn_t xiic_process(int irq, void *dev_id)
/* The bus is not busy, disable BusNotBusy interrupt */
xiic_irq_dis(i2c, XIIC_INTR_BNB_MASK);
+ if (i2c->tx_msg && i2c->smbus_block_read) {
+ i2c->smbus_block_read = false;
+ /* Set requested message len=1 to indicate STATE_DONE */
+ i2c->tx_msg->len = 1;
+ }
+
if (!i2c->tx_msg)
goto out;
@@ -763,8 +825,12 @@ static void xiic_start_recv(struct xiic_i2c *i2c)
rfd_set = IIC_RX_FIFO_DEPTH - 1;
} else if ((rx_watermark == 1) || (rx_watermark == 0)) {
rfd_set = rx_watermark - 1;
- /* Handle single byte transfer separately */
- cr |= XIIC_CR_NO_ACK_MASK;
+
+ /* Set No_ACK, except for smbus_block_read */
+ if (!(i2c->rx_msg->flags & I2C_M_RECV_LEN)) {
+ /* Handle single byte transfer separately */
+ cr |= XIIC_CR_NO_ACK_MASK;
+ }
} else {
rfd_set = rx_watermark - 2;
}
@@ -971,7 +1037,7 @@ static int xiic_start_xfer(struct xiic_i2c *i2c)
static int xiic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
- bool broken_read, max_read_len;
+ bool broken_read, max_read_len, smbus_blk_read;
struct xiic_i2c *i2c = i2c_get_adapdata(adap);
int err, count;
@@ -996,20 +1062,22 @@ static int xiic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
i2c->prev_msg_tx = false;
/*
- * Scan through nmsgs, use dynamic mode when none of the below two
+ * Scan through nmsgs, use dynamic mode when none of the below three
* conditions occur. We need standard mode even if one condition holds
* true in the entire array of messages in a single transfer.
* If read transaction as dynamic mode is broken for delayed reads
* in xlnx,axi-iic-2.0 / xlnx,xps-iic-2.00.a IP versions.
* If read length is > 255 bytes.
+ * If smbus_block_read transaction.
*/
for (count = 0; count < i2c->nmsgs; count++) {
broken_read = (i2c->quirks & DYNAMIC_MODE_READ_BROKEN_BIT) &&
(i2c->tx_msg[count].flags & I2C_M_RD);
max_read_len = (i2c->tx_msg[count].flags & I2C_M_RD) &&
(i2c->tx_msg[count].len > MAX_READ_LENGTH_DYNAMIC);
+ smbus_blk_read = (i2c->tx_msg[count].flags & I2C_M_RECV_LEN);
- if (broken_read || max_read_len) {
+ if (broken_read || max_read_len || smbus_blk_read) {
i2c->dynamic = false;
break;
}
@@ -1040,7 +1108,7 @@ static int xiic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
static u32 xiic_func(struct i2c_adapter *adap)
{
- return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_BLOCK_DATA;
}
static const struct i2c_algorithm xiic_algorithm = {
--
2.25.1
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