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Message-ID: <alpine.DEB.2.21.2106260509300.37803@angie.orcam.me.uk>
Date: Sat, 26 Jun 2021 06:10:57 +0200 (CEST)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>
cc: linux-serial@...r.kernel.org, linux-mips@...r.kernel.org,
linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: [PATCH v2 0/2] serial, Malta: Fixes to make the CBUS UART work
big-endian
Hi,
Earlier this year I noticed the CBUS UART, a discrete TI16C550C part
wired directly to the system controller's device bus and supposed to come
up as ttyS2 in addition to ttyS0 and ttyS1 ports from a Super I/O device
behind the PCI southbridge, is not recognised with my MIPS Malta board
booting big-endian.
I got to the bottom of the problem now and as it turns out we have two
long-standing bugs causing it, one in generic 8250 code and another in
Malta platform code, and this has never worked in the big-endian mode.
Here's v2 of the series, addressing minor issues with 1/2 pointed out in
the review.
Please apply.
Maciej
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