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Message-Id: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com>
Date: Sat, 26 Jun 2021 14:18:36 +0800
From: 周琰杰 (Zhou Yanjie)
<zhouyanjie@...yeetech.com>
To: tsbogend@...ha.franken.de, mturquette@...libre.com,
sboyd@...nel.org, paul@...pouillou.net, robh+dt@...nel.org
Cc: linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
dongsheng.qiu@...enic.com, aric.pzqi@...enic.com,
rick.tyliu@...enic.com, sihui.liu@...enic.com,
jun.jiang@...enic.com, sernia.zhou@...mail.com
Subject: [PATCH v4 0/5] Misc Ingenic patches.
Some misc patches that don't really have any relation
between themselves.
周琰杰 (Zhou Yanjie) (5):
MIPS: X1830: Respect cell count of common properties.
dt-bindings: clock: Add documentation for MAC PHY control bindings.
MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
MIPS: CI20: Reduce clocksource to 750 kHz.
MIPS: CI20: Add second percpu timer for SMP.
.../devicetree/bindings/clock/ingenic,cgu.yaml | 2 ++
arch/mips/boot/dts/ingenic/ci20.dts | 24 +++++++++++++---------
arch/mips/boot/dts/ingenic/x1000.dtsi | 7 +++++++
arch/mips/boot/dts/ingenic/x1830.dtsi | 16 ++++++++++-----
4 files changed, 34 insertions(+), 15 deletions(-)
--
2.7.4
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