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Message-Id: <20210627185927.695411-3-iskren.chernev@gmail.com>
Date: Sun, 27 Jun 2021 21:59:24 +0300
From: Iskren Chernev <iskren.chernev@...il.com>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Andy Gross <agross@...nel.org>,
Kathiravan T <kathirav@...eaurora.org>,
Michael Turquette <mturquette@...libre.com>,
Rajendra Nayak <rnayak@...eaurora.org>,
Rob Herring <robh+dt@...nel.org>,
Stephen Boyd <sboyd@...nel.org>, devicetree@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, phone-devel@...r.kernel.org,
~postmarketos/upstreaming@...ts.sr.ht,
Iskren Chernev <iskren.chernev@...il.com>
Subject: [PATCH v2 2/5] dt-bindings: clock: qcom: rpmcc: Document SM6115 compatible
Add the dt-binding for the RPM Clock Controller on the SM4250/6115 SoCs.
Signed-off-by: Iskren Chernev <iskren.chernev@...il.com>
---
Documentation/devicetree/bindings/clock/qcom,rpmcc.txt | 1 +
include/dt-bindings/clock/qcom,rpmcc.h | 10 ++++++++++
2 files changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
index 6cf5a7ec2b4c..0045583f02b5 100644
--- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
@@ -25,6 +25,7 @@ Required properties :
"qcom,rpmcc-msm8998", "qcom,rpmcc"
"qcom,rpmcc-qcs404", "qcom,rpmcc"
"qcom,rpmcc-sdm660", "qcom,rpmcc"
+ "qcom,rpmcc-sm6115", "qcom,rpmcc"
- #clock-cells : shall contain 1
diff --git a/include/dt-bindings/clock/qcom,rpmcc.h b/include/dt-bindings/clock/qcom,rpmcc.h
index 8aaba7cd9589..aa834d516234 100644
--- a/include/dt-bindings/clock/qcom,rpmcc.h
+++ b/include/dt-bindings/clock/qcom,rpmcc.h
@@ -149,5 +149,15 @@
#define RPM_SMD_CE2_A_CLK 103
#define RPM_SMD_CE3_CLK 104
#define RPM_SMD_CE3_A_CLK 105
+#define RPM_SMD_QUP_CLK 106
+#define RPM_SMD_QUP_A_CLK 107
+#define RPM_SMD_MMRT_CLK 108
+#define RPM_SMD_MMRT_A_CLK 109
+#define RPM_SMD_MMNRT_CLK 110
+#define RPM_SMD_MMNRT_A_CLK 111
+#define RPM_SMD_SNOC_PERIPH_CLK 112
+#define RPM_SMD_SNOC_PERIPH_A_CLK 113
+#define RPM_SMD_SNOC_LPASS_CLK 114
+#define RPM_SMD_SNOC_LPASS_A_CLK 115
#endif
--
2.32.0
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