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Message-ID: <202106270840.FeBxiWnc-lkp@intel.com>
Date: Sun, 27 Jun 2021 08:36:46 +0800
From: kernel test robot <lkp@...el.com>
To: Alex Deucher <alexander.deucher@....com>
Cc: kbuild-all@...ts.01.org, clang-built-linux@...glegroups.com,
linux-kernel@...r.kernel.org, Luben Tuikov <luben.tuikov@....com>
Subject: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.c:1813:6:
warning: stack frame size (2592) exceeds limit (2048) in function
'dml30_rq_dlg_get_dlg_reg'
Hi Alex,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 625acffd7ae2c52898d249e6c5c39f348db0d8df
commit: 20f2ffe504728612d7b0c34e4f8280e34251e704 drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)
date: 8 months ago
config: powerpc-buildonly-randconfig-r006-20210627 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 557b101ce714e39438ba1d39c4c50b03e12fcb96)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=20f2ffe504728612d7b0c34e4f8280e34251e704
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 20f2ffe504728612d7b0c34e4f8280e34251e704
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All warnings (new ones prefixed by >>):
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.c:28:
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/../display_mode_lib.h:28:
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:35:
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:29:
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/os_types.h:30:
In file included from include/linux/kgdb.h:18:
In file included from include/linux/atomic.h:7:
In file included from arch/powerpc/include/asm/atomic.h:11:
In file included from arch/powerpc/include/asm/cmpxchg.h:8:
In file included from include/linux/bug.h:5:
In file included from arch/powerpc/include/asm/bug.h:109:
In file included from include/asm-generic/bug.h:20:
In file included from include/linux/kernel.h:12:
In file included from include/linux/bitops.h:29:
In file included from arch/powerpc/include/asm/bitops.h:62:
arch/powerpc/include/asm/barrier.h:49:9: warning: '__lwsync' macro redefined [-Wmacro-redefined]
#define __lwsync() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory")
^
<built-in>:309:9: note: previous definition is here
#define __lwsync __builtin_ppc_lwsync
^
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.c:1813:6: warning: stack frame size (2592) exceeds limit (2048) in function 'dml30_rq_dlg_get_dlg_reg' [-Wframe-larger-than]
void dml30_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
^
2 warnings generated.
vim +/dml30_rq_dlg_get_dlg_reg +1813 drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.c
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1812
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 @1813 void dml30_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1814 display_dlg_regs_st *dlg_regs,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1815 display_ttu_regs_st *ttu_regs,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1816 display_e2e_pipe_params_st *e2e_pipe_param,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1817 const unsigned int num_pipes,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1818 const unsigned int pipe_idx,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1819 const bool cstate_en,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1820 const bool pstate_en,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1821 const bool vm_en,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1822 const bool ignore_viewport_pos,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1823 const bool immediate_flip_support)
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1824 {
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1825 display_rq_params_st rq_param = { 0 };
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1826 display_dlg_sys_params_st dlg_sys_param = { 0 };
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1827
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1828 // Get watermark and Tex.
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1829 dlg_sys_param.t_urg_wm_us = get_wm_urgent(mode_lib, e2e_pipe_param, num_pipes);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1830 dlg_sys_param.deepsleep_dcfclk_mhz = get_clk_dcf_deepsleep(mode_lib,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1831 e2e_pipe_param,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1832 num_pipes);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1833 dlg_sys_param.t_extra_us = get_urgent_extra_latency(mode_lib, e2e_pipe_param, num_pipes);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1834 dlg_sys_param.mem_trip_us = get_wm_memory_trip(mode_lib, e2e_pipe_param, num_pipes);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1835 dlg_sys_param.t_mclk_wm_us = get_wm_dram_clock_change(mode_lib, e2e_pipe_param, num_pipes);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1836 dlg_sys_param.t_sr_wm_us = get_wm_stutter_enter_exit(mode_lib, e2e_pipe_param, num_pipes);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1837 dlg_sys_param.total_flip_bw = get_total_immediate_flip_bw(mode_lib,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1838 e2e_pipe_param,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1839 num_pipes);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1840 dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1841 e2e_pipe_param,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1842 num_pipes);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1843 dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1844 / dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1845
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1846 print__dlg_sys_params_st(mode_lib, dlg_sys_param);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1847
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1848 // system parameter calculation done
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1849
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1850 dml_print("DML_DLG: Calculation for pipe[%d] start\n\n", pipe_idx);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1851 dml_rq_dlg_get_rq_params(mode_lib, &rq_param, e2e_pipe_param[pipe_idx].pipe);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1852 dml_rq_dlg_get_dlg_params(mode_lib,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1853 e2e_pipe_param,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1854 num_pipes,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1855 pipe_idx,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1856 dlg_regs,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1857 ttu_regs,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1858 rq_param.dlg,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1859 dlg_sys_param,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1860 cstate_en,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1861 pstate_en,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1862 vm_en,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1863 ignore_viewport_pos,
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1864 immediate_flip_support);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1865 dml_print("DML_DLG: Calculation for pipe[%d] end\n", pipe_idx);
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1866 }
6725a88f88a7e92 Bhawanpreet Lakha 2020-05-21 1867
:::::: The code at line 1813 was first introduced by commit
:::::: 6725a88f88a7e922e91c45bf83d320487810c192 drm/amd/display: Add DCN3 DML
:::::: TO: Bhawanpreet Lakha <Bhawanpreet.Lakha@....com>
:::::: CC: Alex Deucher <alexander.deucher@....com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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