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Message-ID: <162484891199.2516444.7746269828847489069@swboyd.mtv.corp.google.com>
Date: Sun, 27 Jun 2021 19:55:11 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Alain Volmat <avolmat@...com>,
Michael Turquette <mturquette@...libre.com>,
Patrice Chotard <patrice.chotard@...s.st.com>,
Rob Herring <robh+dt@...nel.org>
Cc: Lee Jones <lee.jones@...aro.org>, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, Alain Volmat <avolmat@...com>
Subject: Re: [PATCH v4 6/7] clk: st: clkgen-fsyn: embed soc clock outputs within compatible data
Quoting Alain Volmat (2021-03-31 13:16:31)
> In order to avoid relying on the old style description via the DT
> clock-output-names, add compatible data describing the flexgen
> outputs clocks for all STiH407/STiH410 and STiH418 SOCs.
>
> In order to ease transition between the two methods, this commit
> introduce the new compatible without removing the old method.
> Once DTs will be fixed, the method relying on DT clock-output-names
> will be removed from this driver as well as old compatibles.
>
> Signed-off-by: Alain Volmat <avolmat@...com>
> Reviewed-by: Patrice Chotard <patrice.chotard@...s.st.com>
> ---
Applied to clk-next
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