| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20210629014736.31153-7-trevor.wu@mediatek.com>
Date: Tue, 29 Jun 2021 09:47:34 +0800
From: Trevor Wu <trevor.wu@...iatek.com>
To: <broonie@...nel.org>, <tiwai@...e.com>, <robh+dt@...nel.org>,
<matthias.bgg@...il.com>
CC: <trevor.wu@...iatek.com>, <alsa-devel@...a-project.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<bicycle.tsai@...iatek.com>, <jiaxin.yu@...iatek.com>,
<cychiang@...gle.com>, <aaronyu@...gle.com>
Subject: [PATCH v2 6/8] dt-bindings: mediatek: mt8195: add audio afe document
This patch adds mt8195 audio afe document.
Signed-off-by: Trevor Wu <trevor.wu@...iatek.com>
---
This patch depends on the following series that have not been accepted.
[1] Mediatek MT8195 clock support
https://patchwork.kernel.org/project/linux-mediatek/list/?series=501923
(dt-bindings/clock/mt8195-clk.h is included)
[2] Mediatek MT8195 power domain support
https://patchwork.kernel.org/project/linux-mediatek/list/?series=500709
(dt-bindings/power/mt8195-power.h is included)
---
.../bindings/sound/mt8195-afe-pcm.yaml | 136 ++++++++++++++++++
1 file changed, 136 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml
diff --git a/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml
new file mode 100644
index 000000000000..a4fb5c7dd022
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml
@@ -0,0 +1,136 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek AFE PCM controller for mt8195
+
+maintainers:
+ - Trevor Wu <trevor.wu@...iatek.com>
+
+properties:
+ compatible:
+ const: mediatek,mt8195-audio
+
+ interrupts:
+ maxItems: 1
+
+ mediatek,topckgen:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of the mediatek topckgen controller
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: audio 26M clock
+ - description: AFE clock
+ - description: audio infra sys clock
+ - description: audio infra 26M clock
+
+ clock-names:
+ items:
+ - const: clk26m
+ - const: aud_afe
+ - const: infra_ao_audio
+ - const: infra_ao_audio_26m_b
+
+ etdm-in1-chn-disabled:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ maxItems: 24
+ description: Specify which input channel should be disabled.
+
+ etdm-in2-chn-disabled:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ maxItems: 16
+ description: Specify which input channel should be disabled.
+
+patternProperties:
+ "^etdm-in[1-2]-mclk-source$":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Specify etdm in mclk source clock.
+ enum:
+ - 0 # xtal_26m_ck
+ - 1 # apll1_ck
+ - 2 # apll2_ck
+ - 3 # apll3_ck
+ - 4 # apll4_ck
+ - 5 # apll5_ck
+ - 6 # hdmirx_apll_ck
+
+ "^etdm-out[1-3]-mclk-source$":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Specify etdm out mclk source clock.
+
+ "^etdm-in[1-2]-mclk-alwasys-on-rate$":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Specify etdm in mclk output rate for always on case.
+
+ "^etdm-out[1-3]-mclk-alwasys-on-rate$":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Specify etdm out mclk output rate for always on case.
+
+ "^etdm-in[1-2]-data-mode$":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Specify etdm in data mode.
+ enum:
+ - 0 # one pin (TDM)
+ - 1 # multi pin (I2S)
+
+ "^etdm-out[1-3]-data-mode$":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Specify etdm out data mode.
+
+ "^etdm-in[1-2]-cowork-source$":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ etdm modules can share the same external clock pin. Specify
+ which etdm clock source is required by this etdm in moudule.
+ enum:
+ - 0 # etdm1_in
+ - 1 # etdm2_in
+ - 2 # etdm1_out
+ - 3 # etdm2_out
+ - 4 # etdm3_out
+
+ "^etdm-out[1-3]-cowork-source$":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ etdm modules can share the same external clock pin. Specify
+ which etdm clock source is required by this etdm out moudule.
+
+required:
+ - compatible
+ - interrupts
+ - mediatek,topckgen
+ - power-domains
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8195-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/power/mt8195-power.h>
+
+ afe: mt8195-afe-pcm {
+ compatible = "mediatek,mt8195-audio";
+ interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
+ mediatek,topckgen = <&topckgen>;
+ power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>;
+ clocks = <&clk26m>,
+ <&audsys CLK_AUD_AFE>,
+ <&infracfg_ao CLK_INFRA_AO_AUDIO>,
+ <&infracfg_ao CLK_INFRA_AO_AUDIO_26M_B>;
+ clock-names = "clk26m",
+ "aud_afe",
+ "infra_ao_audio",
+ "infra_ao_audio_26m_b";
+ };
+
+...
--
2.18.0
Powered by blists - more mailing lists