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Message-ID: <1624968767.5647.2.camel@mhfsdcap03>
Date:   Tue, 29 Jun 2021 20:12:47 +0800
From:   Kewei Xu <kewei.xu@...iatek.com>
To:     Tzung-Bi Shih <tzungbi@...gle.com>
CC:     Matthias Brugger <matthias.bgg@...il.com>, <wsa@...-dreams.de>,
        <robh+dt@...nel.org>, <linux-i2c@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>,
        <srv_heupstream@...iatek.com>, <leilk.liu@...iatek.com>,
        <qii.wang@...iatek.com>, <qiangming.xia@...iatek.com>,
        <liguo.zhang@...iatek.com>
Subject: Re: [PATCH 2/3] i2c: mediatek: Dump i2c/dma register when a timeout
 occurs

On Tue, 2021-06-29 at 12:19 +0800, Tzung-Bi Shih wrote:
> On Wed, Jun 9, 2021 at 10:44 AM Kewei Xu <kewei.xu@...iatek.com> wrote:
> >
> > On Tue, 2021-06-08 at 16:01 +0200, Matthias Brugger wrote:
> > > Is this offset only for mt8192 or also for mt8183?
> > > In any case that should go in as another patch. Either a fix or a new
> > > mt_i2c_regs_v3[]
> >
> > This offset value is suitable for the IC of mt_i2c_regs_v2 hardware
> > design similar to mt8192/8195, not for 8183.
> >
> > The reason for the modification here is that the previous
> > offset information is incorrect, OFFSET_DEBUGSTAT = 0XE4 is
> > the correct value.
> 
> Please submit another patch for fixing the incorrect value.

Okay, I will resubmit a patch to fixing the incorrect value,Thanks.

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