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Message-ID: <YNw7KorfwK/OcrTw@kroah.com>
Date: Wed, 30 Jun 2021 11:36:42 +0200
From: Greg KH <gregkh@...uxfoundation.org>
To: kan.liang@...ux.intel.com
Cc: peterz@...radead.org, mingo@...hat.com, acme@...nel.org,
linux-kernel@...r.kernel.org, eranian@...gle.com,
namhyung@...nel.org, jolsa@...hat.com, ak@...ux.intel.com,
yao.jin@...ux.intel.com
Subject: Re: [PATCH V3 1/6] perf/x86/intel/uncore: Add Sapphire Rapids server
support
On Tue, Jun 29, 2021 at 11:13:58AM -0700, kan.liang@...ux.intel.com wrote:
> From: Kan Liang <kan.liang@...ux.intel.com>
>
> Intel Sapphire Rapids supports a discovery mechanism, that allows an
> uncore driver to discover the different components ("boxes") of the
> chip.
>
> All the generic information of the uncore boxes should be retrieved from
> the discovery tables. This has been enabled with the commit edae1f06c2cd
> ("perf/x86/intel/uncore: Parse uncore discovery tables"). Add
> use_discovery to indicate the case. The uncore driver doesn't need to
> hard code the generic information for each uncore box.
>
> But we still need to enable various functionality that cannot be
> directly discovered. This is done here.
> - Add a meaningful name for each uncore block.
> - Add CHA filter support.
> - The layout of the control registers for each uncore block is a little
> bit different from the generic one. Set the platform specific format
> and ops. Expose the common ops which can be reused.
> - Add a fixed counter for IMC
>
> All the undiscovered platform-specific features are hard code in the
> spr_uncores[]. Add uncore_type_customized_copy(), instead of the memcpy,
> to only overwrite these features.
>
> Only the uncore blocks which are inculded in the discovery tables are
> enabled here. Other uncore blocks, e.g., free-running counters, will be
> supported in the following patch.
>
> Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
> ---
Why is there no other intel.com review on this before sending it out?
thanks,
greg k-h
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