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Message-ID: <b16453b9-e320-5591-0629-00cd9adf1771@microchip.com>
Date: Wed, 30 Jun 2021 14:47:09 +0000
From: <Claudiu.Beznea@...rochip.com>
To: <stern@...land.harvard.edu>
CC: <gregkh@...uxfoundation.org>, <Nicolas.Ferre@...rochip.com>,
<alexandre.belloni@...tlin.com>, <Ludovic.Desroches@...rochip.com>,
<Cristian.Birsan@...rochip.com>, <linux-usb@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] usb: host: ohci-at91: suspend/resume ports after/before
OHCI accesses
On 24.06.2021 16:23, Alan Stern wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Thu, Jun 24, 2021 at 06:40:25AM +0000, Claudiu.Beznea@...rochip.com wrote:
>> On 23.06.2021 19:41, Alan Stern wrote:
>>> Are there any systems beside the SAMA7G5 and others you tested which
>>> might be affected by this patch? Do they all work pretty much the
>>> same way? (I want to make sure no others will be adversely affected
>>> by this change.)
>>
>> I tested it on SAMA7G5, SAMA5D2 and SAM9X60. I tested the suspend/resume
>> to/from mem. On SAMA5D2 and SAM9X60 there is no clock provided by
>> transceiver A to OHCI. I encountered no issues on tested systems. These IPs
>> are also present on SAMA5D3 and SAMA5D4 systems which I haven't tested as I
>> expect to behave as SAMA5D2 (as the clocking scheme is the same with
>> SAMA5D2). I can also try it on a SAMA5D3 (I don't have a SAMA5D4 with me at
>> the moment), tough, just to be sure nothing is broken there too.
>
> That doesn't answer my question. I asked if there were any systems
> which might be affected by your patch, and you listed a bunch of
> systems that _aren't_ affected (that is, they continue to work
> properly).
I wrongly understood the initial question.
>
> What systems might run into trouble with this patch?
These are all I haven't tested and might be affected:
AT91RM9200,
SAM9260,
SAM9261,
SAM9263,
SAM9N12,
SAM9X35,
SAM9G45.
The last two (SAM9X35 and SAM9G45) have the same clocking scheme with
SAMA5D2 (which I tested). For the rest of them I cannot find the clocking
scheme in datasheets and don't have them to test (at least at the moment).
Thank you,
Claudiu Beznea
>
> Alan Stern
>
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