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Message-Id: <1625087320-194204-4-git-send-email-kan.liang@linux.intel.com>
Date: Wed, 30 Jun 2021 14:08:27 -0700
From: kan.liang@...ux.intel.com
To: peterz@...radead.org, mingo@...hat.com, gregkh@...uxfoundation.org,
acme@...nel.org, linux-kernel@...r.kernel.org
Cc: eranian@...gle.com, namhyung@...nel.org, jolsa@...hat.com,
ak@...ux.intel.com, yao.jin@...ux.intel.com,
Kan Liang <kan.liang@...ux.intel.com>
Subject: [PATCH V4 03/16] perf/x86/intel/uncore: Add Sapphire Rapids server IIO support
From: Kan Liang <kan.liang@...ux.intel.com>
The IIO stacks are responsible for managing the traffic between the PCI
Express* (PCIe*) domain and the mesh domain. The IIO PMON block is
situated near the IIO stacks traffic controller capturing the traffic
controller as well as the PCIe* root port information.
The layout of the control registers for a IIO uncore unit is a little
bit different from the generic one.
Reviewed-by: Andi Kleen <ak@...ux.intel.com>
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
---
arch/x86/events/intel/uncore_snbep.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 79d9f67..3f44518 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -5438,11 +5438,18 @@ static struct intel_uncore_type spr_uncore_chabox = {
.format_group = &spr_uncore_chabox_format_group,
};
+static struct intel_uncore_type spr_uncore_iio = {
+ .name = "iio",
+ .event_mask = SNBEP_PMON_RAW_EVENT_MASK,
+ .event_mask_ext = SNR_IIO_PMON_RAW_EVENT_MASK_EXT,
+ .format_group = &snr_uncore_iio_format_group,
+};
+
#define UNCORE_SPR_NUM_UNCORE_TYPES 12
static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = {
&spr_uncore_chabox,
- NULL,
+ &spr_uncore_iio,
NULL,
NULL,
NULL,
--
2.7.4
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