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Message-ID: <20210701195655.knbcikdga57a7epx@luna>
Date: Thu, 1 Jul 2021 21:56:55 +0200
From: Emmanuel Gil Peyrot <linkmauve@...kmauve.fr>
To: Jonathan Neuschäfer <j.ne@...teo.net>
Cc: Emmanuel Gil Peyrot <linkmauve@...kmauve.fr>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
linuxppc-dev@...ts.ozlabs.org, devicetree@...r.kernel.org,
Ash Logan <ash@...quark.com>, Rob Herring <robh+dt@...nel.org>,
Michael Ellerman <mpe@...erman.id.au>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/4] powerpc: wii.dts: Expose the OTP on this platform
On Sat, Jun 26, 2021 at 11:34:01PM +0000, Jonathan Neuschäfer wrote:
> On Wed, May 19, 2021 at 11:50:43AM +0200, Emmanuel Gil Peyrot wrote:
> > This can be used by the newly-added nintendo-otp nvmem module.
> >
> > Signed-off-by: Emmanuel Gil Peyrot <linkmauve@...kmauve.fr>
> > ---
> > arch/powerpc/boot/dts/wii.dts | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/arch/powerpc/boot/dts/wii.dts b/arch/powerpc/boot/dts/wii.dts
> > index aaa381da1906..7837c4a3f09c 100644
> > --- a/arch/powerpc/boot/dts/wii.dts
> > +++ b/arch/powerpc/boot/dts/wii.dts
> > @@ -219,6 +219,11 @@ control@...0100 {
> > reg = <0x0d800100 0x300>;
> > };
> >
> > + otp@...01ec {
> > + compatible = "nintendo,hollywood-otp";
> > + reg = <0x0d8001ec 0x8>;
>
> The OTP registers overlap with the previous node, control@...0100.
> Not sure what's the best way to structure the devicetree in this case,
> maybe something roughly like the following (untested, unverified):
[snip]
I couldn’t get this to work, but additionally it looks like it should
start 0x100 earlier and contain pic1@...0030 and gpio@...00c0, given
https://wiibrew.org/wiki/Hardware/Hollywood_Registers
Would it make sense, for the time being, to reduce the size of this
control@...0100 device to the single register currently being used by
arch/powerpc/platforms/embedded6xx/wii.c (0xd800194, used to reboot the
system) and leave the refactor of restart + OTP + PIC + GPIO for a
future series?
Thanks,
--
Emmanuel Gil Peyrot
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