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Message-ID: <CAFnufp1H4fzOHcinAgS0nnStSqLcALKAtk0QYkrnkQvwAx=BNA@mail.gmail.com>
Date: Fri, 2 Jul 2021 16:44:16 +0200
From: Matteo Croce <mcroce@...ux.microsoft.com>
To: Ben Dooks <ben.dooks@...ethink.co.uk>
Cc: Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Nick Kossifidis <mick@....forth.gr>,
Guo Ren <guoren@...nel.org>,
Christoph Hellwig <hch@...radead.org>,
David Laight <David.Laight@...lab.com>,
Palmer Dabbelt <palmer@...belt.com>,
Emil Renner Berthing <kernel@...il.dk>,
Drew Fustini <drew@...gleboard.org>,
linux-arch <linux-arch@...r.kernel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Nick Desaulniers <ndesaulniers@...gle.com>,
linux-riscv <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v2 1/3] lib/string: optimized memcpy
On Fri, Jul 2, 2021 at 4:37 PM Ben Dooks <ben.dooks@...ethink.co.uk> wrote:
>
> On 02/07/2021 13:31, Matteo Croce wrote:
> > From: Matteo Croce <mcroce@...rosoft.com>
> >
> > Rewrite the generic memcpy() to copy a word at time, without generating
> > unaligned accesses.
> >
> > The procedure is made of three steps:
> > First copy data one byte at time until the destination buffer is aligned
> > to a long boundary.
> > Then copy the data one long at time shifting the current and the next long
> > to compose a long at every cycle.
> > Finally, copy the remainder one byte at time.
> >
> > This is the improvement on RISC-V:
> >
> > original aligned: 75 Mb/s
> > original unaligned: 75 Mb/s
> > new aligned: 114 Mb/s
> > new unaligned: 107 Mb/s
> >
> > and this the binary size increase according to bloat-o-meter:
> >
> > Function old new delta
> > memcpy 36 324 +288
> >
> >
> > Signed-off-by: Matteo Croce <mcroce@...rosoft.com>
> > ---
> > lib/string.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++++++--
> > 1 file changed, 77 insertions(+), 3 deletions(-)
>
> Doesn't arch/riscv/lib/memcpy.S also exist for an architecture
> optimised version? I would have thought the lib/string.c version
> was not being used?
>
>
Yes, but this series started as C replacement for the assembly one,
which generates unaligned accesses.
Unfortunately the existing RISC-V processors can't handle unaligned
accesses, so they are emulated with a terrible slowdown.
Then, since there wasn't any riscv specific code, it was proposed as
generic code:
Discussion: https://lore.kernel.org/linux-riscv/20210617152754.17960-1-mcroce@linux.microsoft.com/
--
per aspera ad upstream
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