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Date:   Sat, 3 Jul 2021 10:53:57 -0500
From:   Segher Boessenkool <segher@...nel.crashing.org>
To:     Jonathan Neuschäfer <j.ne@...teo.net>
Cc:     Emmanuel Gil Peyrot <linkmauve@...kmauve.fr>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>,
        Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        Ash Logan <ash@...quark.com>,
        Paul Mackerras <paulus@...ba.org>,
        linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH v2 3/4] powerpc: wii.dts: Expose the OTP on this platform

On Fri, Jul 02, 2021 at 08:56:31AM +0000, Jonathan Neuschäfer wrote:
> On Thu, Jul 01, 2021 at 09:56:55PM +0200, Emmanuel Gil Peyrot wrote:
> > On Sat, Jun 26, 2021 at 11:34:01PM +0000, Jonathan Neuschäfer wrote:
> > > On Wed, May 19, 2021 at 11:50:43AM +0200, Emmanuel Gil Peyrot wrote:
> [...]
> > > > +		otp@...01ec {
> > > > +			compatible = "nintendo,hollywood-otp";
> > > > +			reg = <0x0d8001ec 0x8>;
> > > 
> > > The OTP registers overlap with the previous node, control@...0100.
> > > Not sure what's the best way to structure the devicetree in this case,
> > > maybe something roughly like the following (untested, unverified):
> > [snip]
> > 
> > I couldn’t get this to work, but additionally it looks like it should
> > start 0x100 earlier and contain pic1@...0030 and gpio@...00c0, given
> > https://wiibrew.org/wiki/Hardware/Hollywood_Registers
> > 
> > Would it make sense, for the time being, to reduce the size of this
> > control@...0100 device to the single register currently being used by
> > arch/powerpc/platforms/embedded6xx/wii.c (0xd800194, used to reboot the
> > system) and leave the refactor of restart + OTP + PIC + GPIO for a
> > future series?
> 
> Makes sense to me!

There is no benefit to pretending there is a "control" bus (there is no
such thing), it only gets in the way.


Segher

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