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Message-ID: <512298bd-f357-d2e6-9b1b-3a8b674cd3f4@linaro.org>
Date: Mon, 5 Jul 2021 12:38:27 +0300
From: Stanimir Varbanov <stanimir.varbanov@...aro.org>
To: Dikshita Agarwal <dikshita@...eaurora.org>,
linux-media@...r.kernel.org, stanimir.varbanov@...aro.org
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
vgarodia@...eaurora.org
Subject: Re: [PATCH v2 1/7] venus: firmware: enable no tz fw loading for
sc7280
On 7/1/21 11:05 AM, Dikshita Agarwal wrote:
> - Enable no tz FW loading.
> - add routine to reset XTSS.
>
> Signed-off-by: Dikshita Agarwal <dikshita@...eaurora.org>
> ---
> drivers/media/platform/qcom/venus/firmware.c | 41 ++++++++++++++++++------
> drivers/media/platform/qcom/venus/hfi_venus_io.h | 2 ++
> 2 files changed, 33 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c
> index 227bd3b..d5a4674 100644
> --- a/drivers/media/platform/qcom/venus/firmware.c
> +++ b/drivers/media/platform/qcom/venus/firmware.c
> @@ -27,7 +27,12 @@
> static void venus_reset_cpu(struct venus_core *core)
> {
> u32 fw_size = core->fw.mapped_mem_size;
> - void __iomem *wrapper_base = core->wrapper_base;
> + void __iomem *wrapper_base;
> +
> + if (IS_V6(core))
> + wrapper_base = core->wrapper_tz_base;
> + else
> + wrapper_base = core->wrapper_base;
>
> writel(0, wrapper_base + WRAPPER_FW_START_ADDR);
> writel(fw_size, wrapper_base + WRAPPER_FW_END_ADDR);
> @@ -35,11 +40,18 @@ static void venus_reset_cpu(struct venus_core *core)
> writel(fw_size, wrapper_base + WRAPPER_CPA_END_ADDR);
> writel(fw_size, wrapper_base + WRAPPER_NONPIX_START_ADDR);
> writel(fw_size, wrapper_base + WRAPPER_NONPIX_END_ADDR);
> - writel(0x0, wrapper_base + WRAPPER_CPU_CGC_DIS);
> - writel(0x0, wrapper_base + WRAPPER_CPU_CLOCK_CONFIG);
>
> - /* Bring ARM9 out of reset */
> - writel(0, wrapper_base + WRAPPER_A9SS_SW_RESET);
> + if (IS_V6(core)) {
> + /* Bring XTSS out of reset */
> + writel(0, wrapper_base + WRAPPER_TZ_XTSS_SW_RESET);
> + }
> + else {
} else {
...
}
> + writel(0x0, wrapper_base + WRAPPER_CPU_CGC_DIS);
> + writel(0x0, wrapper_base + WRAPPER_CPU_CLOCK_CONFIG);
> +
> + /* Bring ARM9 out of reset */
> + writel(0, wrapper_base + WRAPPER_A9SS_SW_RESET);
> + }
> }
>
> int venus_set_hw_state(struct venus_core *core, bool resume)
> @@ -56,7 +68,9 @@ int venus_set_hw_state(struct venus_core *core, bool resume)
> if (resume) {
> venus_reset_cpu(core);
> } else {
> - if (!IS_V6(core))
> + if (IS_V6(core))
> + writel(1, core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
> + else
> writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET);
> }
>
> @@ -162,12 +176,19 @@ static int venus_shutdown_no_tz(struct venus_core *core)
> u32 reg;
> struct device *dev = core->fw.dev;
> void __iomem *wrapper_base = core->wrapper_base;
> + void __iomem *wrapper_tz_base = core->wrapper_tz_base;
>
> + if (IS_V6(core)) {
> + /* Assert the reset to XTSS */
insert one tab before comment
> + reg = readl_relaxed(wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
> + reg |= WRAPPER_XTSS_SW_RESET_BIT;
> + writel_relaxed(reg, wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
> + } else {
> /* Assert the reset to ARM9 */
insert one tab before comment
> - reg = readl_relaxed(wrapper_base + WRAPPER_A9SS_SW_RESET);
> - reg |= WRAPPER_A9SS_SW_RESET_BIT;
> - writel_relaxed(reg, wrapper_base + WRAPPER_A9SS_SW_RESET);
> -
> + reg = readl_relaxed(wrapper_base + WRAPPER_A9SS_SW_RESET);
> + reg |= WRAPPER_A9SS_SW_RESET_BIT;
> + writel_relaxed(reg, wrapper_base + WRAPPER_A9SS_SW_RESET);
> + }
> /* Make sure reset is asserted before the mapping is removed */
> mb();
>
> diff --git a/drivers/media/platform/qcom/venus/hfi_venus_io.h b/drivers/media/platform/qcom/venus/hfi_venus_io.h
> index 300c6e47..9735a24 100644
> --- a/drivers/media/platform/qcom/venus/hfi_venus_io.h
> +++ b/drivers/media/platform/qcom/venus/hfi_venus_io.h
> @@ -149,6 +149,8 @@
> /* Wrapper TZ 6xx */
> #define WRAPPER_TZ_BASE_V6 0x000c0000
> #define WRAPPER_TZ_CPU_STATUS_V6 0x10
> +#define WRAPPER_TZ_XTSS_SW_RESET 0x1000
> +#define WRAPPER_XTSS_SW_RESET_BIT BIT(0)
>
> /* Venus AON */
> #define AON_BASE_V6 0x000e0000
>
--
regards,
Stan
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