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Date:   Tue, 6 Jul 2021 14:03:57 -0700
From:   Tom Rix <trix@...hat.com>
To:     Nava kishore Manne <nava.manne@...inx.com>, robh+dt@...nel.org,
        michal.simek@...inx.com, mdf@...nel.org, arnd@...db.de,
        rajan.vaja@...inx.com, gregkh@...uxfoundation.org,
        amit.sunil.dhamne@...inx.com, tejas.patel@...inx.com,
        zou_wei@...wei.com, lakshmi.sai.krishna.potthuri@...inx.com,
        ravi.patel@...inx.com, iwamatsu@...auri.org,
        wendy.liang@...inx.com, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-fpga@...r.kernel.org, git@...inx.com,
        chinnikishore369@...il.com
Subject: Re: [PATCH v8 1/5] drivers: firmware: Add PDI load API support


On 6/26/21 8:52 AM, Nava kishore Manne wrote:
> This patch adds load PDI API support to enable full/partial PDI loading
> from linux. Programmable Device Image (PDI) is combination of headers,
> images and bitstream files to be loaded.
>
> Signed-off-by: Nava kishore Manne <nava.manne@...inx.com>
> Reviewed-by: Moritz Fischer <mdf@...nel.org>
> ---
> Changes for v2:
>                -Updated API Doc and commit msg.
>                 No functional changes.
>
> Changes for v3:
>                -None.
>
> Changes for v4:
>                -Rebased the changes on linux-next.
>                 No functional changes
>
> Changes for v5:
>                -None.
>
> Changes for v6:
>                -None.
>
> Changes for v7:
>                -None.
>
> Changes for v8:
>                 -None.
>
>   drivers/firmware/xilinx/zynqmp.c     | 17 +++++++++++++++++
>   include/linux/firmware/xlnx-zynqmp.h | 10 ++++++++++
>   2 files changed, 27 insertions(+)
>
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index 15b138326ecc..2db571da9ad8 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -1011,6 +1011,23 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
>   }
>   EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
>   
> +/**
> + * zynqmp_pm_load_pdi - Load and process PDI
> + * @src:       Source device where PDI is located
> + * @address:   PDI src address
> + *
> + * This function provides support to load PDI from linux
> + *
> + * Return: Returns status, either success or error+reason
> + */
> +int zynqmp_pm_load_pdi(const u32 src, const u64 address)
> +{
> +	return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src,
> +				   lower_32_bits(address),
> +				   upper_32_bits(address), 0, NULL);
> +}
> +EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
> +
>   /**
>    * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
>    * AES-GCM core.
> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
> index 9d1a5c175065..56b426fe020c 100644
> --- a/include/linux/firmware/xlnx-zynqmp.h
> +++ b/include/linux/firmware/xlnx-zynqmp.h
> @@ -52,6 +52,10 @@
>   #define	ZYNQMP_PM_CAPABILITY_WAKEUP	0x4U
>   #define	ZYNQMP_PM_CAPABILITY_UNUSABLE	0x8U
>   
> +/* Loader commands */
> +#define PM_LOAD_PDI	0x701
This should be defined in enum pm_api_id
> +#define PDI_SRC_DDR	0xF

This is only used by versal_fpga_ops_write(), consider moving the 
#define to versal-fpga.c

Tom

> +
>   /*
>    * Firmware FPGA Manager flags
>    * XILINX_ZYNQMP_PM_FPGA_FULL:	FPGA full reconfiguration
> @@ -411,6 +415,7 @@ int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
>   				 u32 *value);
>   int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
>   				 u32 value);
> +int zynqmp_pm_load_pdi(const u32 src, const u64 address);
>   #else
>   static inline int zynqmp_pm_get_api_version(u32 *version)
>   {
> @@ -622,6 +627,11 @@ static inline int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
>   {
>   	return -ENODEV;
>   }
> +
> +static inline int zynqmp_pm_load_pdi(const u32 src, const u64 address)
> +{
> +	return -ENODEV;
> +}
>   #endif
>   
>   #endif /* __FIRMWARE_ZYNQMP_H__ */

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