lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1271fa28-dddd-01a3-5ad5-e3b4898f5482@baylibre.com>
Date:   Tue, 6 Jul 2021 11:54:05 +0200
From:   Neil Armstrong <narmstrong@...libre.com>
To:     Art Nikpal <email2tema@...il.com>,
        Huacai Chen <chenhuacai@...il.com>
Cc:     陈华才 <chenhuacai@...ngson.cn>,
        Bjorn Helgaas <helgaas@...nel.org>,
        Yue Wang <yue.wang@...ogic.com>,
        Kevin Hilman <khilman@...libre.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Wilczynski <kw@...ux.com>,
        Jerome Brunet <jbrunet@...libre.com>,
        Christian Hewitt <christianshewitt@...il.com>,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        PCI <linux-pci@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        "open list:ARM/Amlogic Meson..." <linux-amlogic@...ts.infradead.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Artem Lapkin <art@...das.com>, Nick Xie <nick@...das.com>,
        Gouwa Wang <gouwa@...das.com>
Subject: Re: [PATCH 0/4] PCI: replace dublicated MRRS limit quirks

Hi,

On 06/07/2021 08:06, Art Nikpal wrote:
>> But, Loongson platform has newer revision of hardware, and the MRRS
>> quirk has changed, please see:
>> https://patchwork.kernel.org/project/linux-pci/list/?series=509497
>> Huacai
> 
> OK! tnx for information ! maybe we can cooperate and make one
> universal quirk for all

In their Designware PCIe controller driver, amlogic sets the Max_Payload_Size & Max_Read_Request_Size to 256:
https://elixir.bootlin.com/linux/latest/source/drivers/pci/controller/dwc/pci-meson.c#L260
https://elixir.bootlin.com/linux/latest/source/drivers/pci/controller/dwc/pci-meson.c#L276
in their root port PCIe Express Device Control Register.

Looking at the Synopsys DW-PCIe Databook, Max_Payload_Size & Max_Read_Request_Size are used to decompose into AXI burst,
but it seems the Max_Payload_Size & Max_Read_Request_Size are set by default to 512 but the internal Max_Payload_Size_Supported
is set to 256, thus changing these values to 256 at runtime to match and optimize bandwidth.

It's said, "Reducing Outbound Decomposition" :
 - "Ensure that your application master does not generate bursts of size greater than or equal to Max_Payload_Size"
 - "Program your PCIe system with a larger value of Max_Payload_Size without exceeding Max_Payload_Size_Supported"
 - "Program your PCIe system with a larger value of Max_Read_Request without exceeding Max_Payload_Size_Supported:

So leaving 512 in Max_Payload_Size & Max_Read_Request leads to Outbound Decomposition which decreases PCIe link and degrades
the AXI bus by doubling the bursts, leading to this fix to avoid overflowing the AXI bus.

So it seems to be still needed, I assume this *should* be handled in the core somehow to propagate these settings to child endpoints to match
the root port Max_Payload_Size & Max_Read_Request sizes.

Maybe by adding a core function to set these values instead of using the dw_pcie_find_capability() & dw_pcie_write/readl_dbi() helpers
and set a state on the root port to propagate the value ?

Neil

> 
> On Tue, Jul 6, 2021 at 9:36 AM Huacai Chen <chenhuacai@...il.com> wrote:
>>
>> Hi, Art,
>>
>> On Mon, Jul 5, 2021 at 4:35 PM Art Nikpal <email2tema@...il.com> wrote:
>>>
>>>> Does that means keystone and Loongson has the same MRRS problem? And what should I do now?
>>>
>>> Look like yes ! and  amlogic has the same problem.
>>> I think somebody need to rewrite it all to one common quirk for this problem.
>>>
>>> If no one has any objection, I can try to remake it again.
>> But, Loongson platform has newer revision of hardware, and the MRRS
>> quirk has changed, please see:
>> https://patchwork.kernel.org/project/linux-pci/list/?series=509497
>>
>> Huacai
>>>
>>> On Fri, Jul 2, 2021 at 9:15 AM 陈华才 <chenhuacai@...ngson.cn> wrote:
>>>>
>>>> Hi, Bjorn,
>>>>
>>>> &gt; -----原始邮件-----
>>>> &gt; 发件人: "Bjorn Helgaas" <helgaas@...nel.org>
>>>> &gt; 发送时间: 2021-07-01 23:46:34 (星期四)
>>>> &gt; 收件人: "Artem Lapkin" <email2tema@...il.com>
>>>> &gt; 抄送: narmstrong@...libre.com, yue.wang@...ogic.com, khilman@...libre.com, lorenzo.pieralisi@....com, robh@...nel.org, kw@...ux.com, jbrunet@...libre.com, christianshewitt@...il.com, martin.blumenstingl@...glemail.com, linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org, art@...das.com, nick@...das.com, gouwa@...das.com, "Huacai Chen" <chenhuacai@...ngson.cn>
>>>> &gt; 主题: Re: [PATCH 0/4] PCI: replace dublicated MRRS limit quirks
>>>> &gt;
>>>> &gt; [+cc Huacai]
>>>> &gt;
>>>> &gt; On Sat, Jun 19, 2021 at 02:39:48PM +0800, Artem Lapkin wrote:
>>>> &gt; &gt; Replace dublicated MRRS limit quirks by mrrs_limit_quirk from core
>>>> &gt; &gt; * drivers/pci/controller/dwc/pci-keystone.c
>>>> &gt; &gt; * drivers/pci/controller/pci-loongson.c
>>>> &gt;
>>>> &gt; s/dublicated/duplicated/ (several occurrences)
>>>> &gt;
>>>> &gt; Capitalize subject lines.
>>>> &gt;
>>>> &gt; Use "git log --online" to learn conventions and follow them.
>>>> &gt;
>>>> &gt; Add "()" after function names.
>>>> &gt;
>>>> &gt; Capitalize acronyms appropriately (NVMe, MRRS, PCI, etc).
>>>> &gt;
>>>> &gt; End sentences with periods.
>>>> &gt;
>>>> &gt; A "move" patch must include both the removal and the addition and make
>>>> &gt; no changes to the code itself.
>>>> &gt;
>>>> &gt; Amlogic appears without explanation in 2/4.  Must be separate patch to
>>>> &gt; address only that specific issue.  Should reference published erratum
>>>> &gt; if possible.  "Solves some issue" is not a compelling justification.
>>>> &gt;
>>>> &gt; The tree must be consistent and functionally the same or improved
>>>> &gt; after every patch.
>>>> &gt;
>>>> &gt; Add to pci_ids.h only if symbol used more than one place.
>>>> &gt;
>>>> &gt; See
>>>> &gt; https://lore.kernel.org/r/20210701074458.1809532-3-chenhuacai@loongson.cn,
>>>> &gt; which looks similar.  Combine efforts if possible and cc Huacai so
>>>> &gt; you're both aware of overlapping work.
>>>> &gt;
>>>> &gt; More hints in case they're useful:
>>>> &gt; https://lore.kernel.org/linux-pci/20171026223701.GA25649@bhelgaas-glaptop.roam.corp.google.com/
>>>> &gt;
>>>> &gt; &gt; Both ks_pcie_quirk loongson_mrrs_quirk was rewritten without any
>>>> &gt; &gt; functionality changes by one mrrs_limit_quirk
>>>> Does that means keystone and Loongson has the same MRRS problem? And what should I do now?
>>>>
>>>> Huacai
>>>> &gt; &gt;
>>>> &gt; &gt; Added DesignWare PCI controller which need same quirk for
>>>> &gt; &gt; * drivers/pci/controller/dwc/pci-meson.c (PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3)
>>>> &gt; &gt;
>>>> &gt; &gt; This quirk can solve some issue for Khadas VIM3/VIM3L(Amlogic)
>>>> &gt; &gt; with HDMI scrambled picture and nvme devices at intensive writing...
>>>> &gt; &gt;
>>>> &gt; &gt; come from:
>>>> &gt; &gt; * https://lore.kernel.org/linux-pci/20210618063821.1383357-1-art@khadas.com/
>>>> &gt; &gt;
>>>> &gt; &gt; Artem Lapkin (4):
>>>> &gt; &gt;  PCI: move Keystone and Loongson device IDs to pci_ids
>>>> &gt; &gt;  PCI: core: quirks: add mrrs_limit_quirk
>>>> &gt; &gt;  PCI: keystone move mrrs quirk to core
>>>> &gt; &gt;  PCI: loongson move mrrs quirk to core
>>>> &gt; &gt;
>>>> &gt; &gt; --
>>>> &gt; &gt; 2.25.1
>>>> &gt; &gt;
>>>>
>>>>
>>>> </chenhuacai@...ngson.cn></email2tema@...il.com></helgaas@...nel.org>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ