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Message-Id: <20210707031552.20166-3-jiaxun.yang@flygoat.com>
Date: Wed, 7 Jul 2021 11:15:45 +0800
From: Jiaxun Yang <jiaxun.yang@...goat.com>
To: linux-mips@...r.kernel.org
Cc: tsbogend@...ha.franken.de, mturquette@...libre.com,
daniel.lezcano@...aro.org, linus.walleij@...aro.org,
vkoul@...nel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
Jiaxun Yang <jiaxun.yang@...goat.com>
Subject: [PATCH v2 2/9] MIPS: DTS: Pistachio add missing cpc and cdmm
CPC and CDMM addresses are adjustable and we should tell kernel
how to place them in devicetree.
Note that MACH_PISTACHIO code hardcoded CDMM base to 0x1bdd0000,
however it will collide with GIC address range. As we don't have
any CDMM device on this platform it won't be a problem.
I found another spare range, 0x1bdf0000~0x1be00000 to place CDMM
instead.
Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
---
arch/mips/boot/dts/img/pistachio.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/mips/boot/dts/img/pistachio.dtsi b/arch/mips/boot/dts/img/pistachio.dtsi
index dc3b7909de73..b1db8b8f446f 100644
--- a/arch/mips/boot/dts/img/pistachio.dtsi
+++ b/arch/mips/boot/dts/img/pistachio.dtsi
@@ -900,6 +900,16 @@ timer {
};
};
+ cpc: cpc@...e0000 {
+ compatible = "mti,mips-cpc";
+ reg = <0x1bde0000 0x10000>;
+ };
+
+ cdmm: cdmm@...f0000 {
+ compatible = "mti,mips-cdmm";
+ reg = <0x1bdf0000 0x10000>;
+ };
+
usb_phy: usb-phy {
compatible = "img,pistachio-usb-phy";
clocks = <&clk_core CLK_USB_PHY>;
--
2.32.0
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