linux-kernel - [PATCH v6 4/5] dts: marvell: Enable 10G interfaces on 9130-DB and 9131-DB boards

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Date:   Thu, 8 Jul 2021 14:25:27 +0300
From:   <kostap@...vell.com>
To:     <miquel.raynal@...tlin.com>, <kishon@...com>, <vkoul@...nel.org>,
        <robh+dt@...nel.org>, <andrew@...n.ch>,
        <gregory.clement@...tlin.com>, <sebastian.hesselbarth@...il.com>,
        <vladimir.vid@...tura.hr>, <luka.kovacic@...tura.hr>,
        <linux-phy@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>
CC:     <mw@...ihalf.com>, <jaz@...ihalf.com>, <nadavh@...vell.com>,
        <stefanc@...vell.com>, <bpeled@...vell.com>,
        Konstantin Porotchkin <kostap@...vell.com>
Subject: [PATCH v6 4/5] dts: marvell: Enable 10G interfaces on 9130-DB and 9131-DB boards

From: Stefan Chulski <stefanc@...vell.com>

This patch enables eth0 10G interface on CN9130-DB paltforms and
eth0 10G and eth3 10G interfaces on CN9131-DB.

Signed-off-by: Stefan Chulski <stefanc@...vell.com>
Signed-off-by: Konstantin Porotchkin <kostap@...vell.com>
---
 arch/arm64/boot/dts/marvell/cn9130-db.dtsi | 2 +-
 arch/arm64/boot/dts/marvell/cn9131-db.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
index 34274e061958..39fc90716454 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
@@ -125,7 +125,7 @@
 
 /* SLM-1521-V2, CON9 */
 &cp0_eth0 {
-	status = "disabled";
+	status = "okay";
 	phy-mode = "10gbase-kr";
 	/* Generic PHY, providing serdes lanes */
 	phys = <&cp0_comphy4 0>;
diff --git a/arch/arm64/boot/dts/marvell/cn9131-db.dtsi b/arch/arm64/boot/dts/marvell/cn9131-db.dtsi
index a7ab791631bc..daddab638fb8 100644
--- a/arch/arm64/boot/dts/marvell/cn9131-db.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9131-db.dtsi
@@ -84,7 +84,7 @@
 
 /* CON50 */
 &cp1_eth0 {
-	status = "disabled";
+	status = "okay";
 	phy-mode = "10gbase-kr";
 	/* Generic PHY, providing serdes lanes */
 	phys = <&cp1_comphy4 0>;
-- 
2.17.1