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Message-ID: <3pFCrTgsGtxAZ1a2xns0dgqCOz61HZr4foJlLOl1l3I@cp4-web-034.plabs.ch>
Date: Fri, 09 Jul 2021 07:28:20 +0000
From: Yassine Oudjana <y.oudjana@...tonmail.com>
To: Rob Clark <robdclark@...il.com>
Cc: dri-devel@...ts.freedesktop.org,
Rob Clark <robdclark@...omium.org>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
John Stultz <john.stultz@...aro.org>,
Sean Paul <sean@...rly.run>, David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Jordan Crouse <jordan@...micpenguin.net>,
linux-arm-msm@...r.kernel.org, freedreno@...ts.freedesktop.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/msm: Fix display fault handling
On Wed, Jul 7 2021 at 21:57:05 +0400, Rob Clark <robdclark@...il.com>
wrote:
> From: Rob Clark <robdclark@...omium.org>
>
> It turns out that when the display is enabled by the bootloader, we
> can
> get some transient iommu faults from the display. Which doesn't go
> over
> too well when we install a fault handler that is gpu specific. To
> avoid
> this, defer installing the fault handler until we get around to
> setting
> up per-process pgtables (which is adreno_smmu specific). The arm-smmu
> fallback error reporting is sufficient for reporting display related
> faults (and in fact was all we had prior to
> f8f934c180f629bb927a04fd90d)
>
> Reported-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> Reported-by: Yassine Oudjana <y.oudjana@...tonmail.com>
> Fixes: 2a574cc05d38 ("drm/msm: Improve the a6xx page fault handler")
> Signed-off-by: Rob Clark <robdclark@...omium.org>
> Tested-by: John Stultz <john.stultz@...aro.org>
> ---
> drivers/gpu/drm/msm/msm_iommu.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/msm_iommu.c
> b/drivers/gpu/drm/msm/msm_iommu.c
> index eed2a762e9dd..bcaddbba564d 100644
> --- a/drivers/gpu/drm/msm/msm_iommu.c
> +++ b/drivers/gpu/drm/msm/msm_iommu.c
> @@ -142,6 +142,9 @@ static const struct iommu_flush_ops null_tlb_ops
> = {
> .tlb_add_page = msm_iommu_tlb_add_page,
> };
>
> +static int msm_fault_handler(struct iommu_domain *domain, struct
> device *dev,
> + unsigned long iova, int flags, void *arg);
> +
> struct msm_mmu *msm_iommu_pagetable_create(struct msm_mmu *parent)
> {
> struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(parent->dev);
> @@ -157,6 +160,13 @@ struct msm_mmu
> *msm_iommu_pagetable_create(struct msm_mmu *parent)
> if (!ttbr1_cfg)
> return ERR_PTR(-ENODEV);
>
> + /*
> + * Defer setting the fault handler until we have a valid adreno_smmu
> + * to avoid accidentially installing a GPU specific fault handler
> for
> + * the display's iommu
> + */
> + iommu_set_fault_handler(iommu->domain, msm_fault_handler, iommu);
> +
> pagetable = kzalloc(sizeof(*pagetable), GFP_KERNEL);
> if (!pagetable)
> return ERR_PTR(-ENOMEM);
> @@ -300,7 +310,6 @@ struct msm_mmu *msm_iommu_new(struct device *dev,
> struct iommu_domain *domain)
>
> iommu->domain = domain;
> msm_mmu_init(&iommu->base, dev, &funcs, MSM_MMU_IOMMU);
> - iommu_set_fault_handler(domain, msm_fault_handler, iommu);
>
> atomic_set(&iommu->pagetables, 0);
>
> --
> 2.31.1
>
Tested-by: Yassine Oudjana <y.oudjana@...tonmail.com>
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