linux-kernel - Re: [PATCH] perf stat: Add Topdown metrics L2 events as default events

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Date:   Fri, 9 Jul 2021 09:52:03 -0300
From:   Arnaldo Carvalho de Melo <acme@...nel.org>
To:     Namhyung Kim <namhyung@...nel.org>
Cc:     "Liang, Kan" <kan.liang@...el.com>, Ingo Molnar <mingo@...hat.com>,
        Jiri Olsa <jolsa@...hat.com>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Yao Jin <yao.jin@...ux.intel.com>,
        Kan Liang <kan.liang@...ux.intel.com>
Subject: Re: [PATCH] perf stat: Add Topdown metrics L2 events as default
 events

Em Thu, Jul 08, 2021 at 10:31:34PM -0700, Namhyung Kim escreveu:
> On Thu, Jul 8, 2021 at 9:04 AM <kan.liang@...el.com> wrote:
> > With the patch:

> >  $ perf stat sleep 1

> >  Performance counter stats for 'sleep 1':

> >               0.59 msec task-clock                #    0.001 CPUs utilized
> >                  1      context-switches          #    1.687 K/sec
> >                  0      cpu-migrations            #    0.000 /sec
> >                 76      page-faults               #  128.198 K/sec
> >          1,405,318      cycles                    #    2.371 GHz
> >          1,471,136      instructions              #    1.05  insn per cycle
> >            310,132      branches                  #  523.136 M/sec
> >             10,435      branch-misses             #    3.36% of all branches
> >          8,431,908      slots                     #   14.223 G/sec
> >          1,554,116      topdown-retiring          #     18.4% retiring
> >          1,289,585      topdown-bad-spec          #     15.2% bad speculation
> >          2,810,636      topdown-fe-bound          #     33.2% frontend bound
> >          2,810,636      topdown-be-bound          #     33.2% backend bound
> >            231,464      topdown-heavy-ops         #      2.7% heavy operations       #     15.6% light operations
> >          1,223,453      topdown-br-mispredict     #     14.5% branch mispredict      #      0.8% machine clears
> >          1,884,779      topdown-fetch-lat         #     22.3% fetch latency          #     10.9% fetch bandwidth
> >          1,454,917      topdown-mem-bound         #     17.2% memory bound           #     16.0% Core bound

> >        1.001179699 seconds time elapsed

> >        0.000000000 seconds user
> >        0.001238000 seconds sys

> > Reviewed-by: Andi Kleen <ak@...ux.intel.com>
> > Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>

> Acked-by: Namhyung Kim <namhyung@...nel.org>

Thanks, applied.

- Arnaldo