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Message-ID: <YOibdx4zyXEbq64q@yoga>
Date: Fri, 9 Jul 2021 13:54:47 -0500
From: Bjorn Andersson <bjorn.andersson@...aro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Andy Gross <agross@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Stephen Boyd <sboyd@...nel.org>,
Taniya Das <tdas@...eaurora.org>,
Jonathan Marek <jonathan@...ek.ca>,
Michael Turquette <mturquette@...libre.com>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Mark Brown <broonie@...nel.org>,
Ulf Hansson <ulf.hansson@...aro.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/7] dt-bindings: clock: qcom,dispcc-sm8x50: add mmcx
power domain
On Fri 09 Jul 12:31 CDT 2021, Dmitry Baryshkov wrote:
> On sm8250 dispcc requires MMCX power domain to be powered up before
> clock controller's registers become available. For now sm8250 was using
> external regulator driven by the power domain to describe this
> relationship. Switch into specifying power-domain and required opp-state
> directly.
>
Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
Regards,
Bjorn
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
> .../devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
> index 0cdf53f41f84..d5c4fed56b6e 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
> @@ -55,6 +55,11 @@ properties:
> reg:
> maxItems: 1
>
> + power-domains:
> + description:
> + A phandle and PM domain specifier for the MMCX power domain.
> + maxItems: 1
> +
> required:
> - compatible
> - reg
> @@ -69,6 +74,7 @@ additionalProperties: false
> examples:
> - |
> #include <dt-bindings/clock/qcom,rpmh.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> clock-controller@...0000 {
> compatible = "qcom,sm8250-dispcc";
> reg = <0x0af00000 0x10000>;
> @@ -89,5 +95,6 @@ examples:
> #clock-cells = <1>;
> #reset-cells = <1>;
> #power-domain-cells = <1>;
> + power-domains = <&rpmhpd SM8250_MMCX>;
> };
> ...
> --
> 2.30.2
>
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