[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20210710130313.5072-27-chang.seok.bae@intel.com>
Date: Sat, 10 Jul 2021 06:03:13 -0700
From: "Chang S. Bae" <chang.seok.bae@...el.com>
To: bp@...e.de, luto@...nel.org, tglx@...utronix.de, mingo@...nel.org,
x86@...nel.org
Cc: len.brown@...el.com, dave.hansen@...el.com,
thiago.macieira@...el.com, jing2.liu@...el.com,
ravi.v.shankar@...el.com, linux-kernel@...r.kernel.org,
chang.seok.bae@...el.com
Subject: [PATCH v7 26/26] x86/fpu/xstate: Add a sanity check for XFD state when saving XSTATE
Add a DEBUG sanity check that XFD state matches with XINUSE state.
Instead of reading MSR IA32_XFD directly, read a per-cpu value that is
recorded at every MSR write.
Suggested-by: Dave Hansen <dave.hansen@...ux.intel.com>
Signed-off-by: Chang S. Bae <chang.seok.bae@...el.com>
Reviewed-by: Len Brown <len.brown@...el.com>
Cc: x86@...nel.org
Cc: linux-kernel@...r.kernel.org
---
Changes from v5:
* Added as a new patch. (Dave Hansen)
---
arch/x86/include/asm/fpu/internal.h | 15 +++++++++++++++
arch/x86/kernel/fpu/core.c | 13 +++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index c9f1573f3ff8..1b3062d5f5a0 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -570,10 +570,25 @@ static inline void switch_fpu_prepare(struct fpu *old_fpu, int cpu)
/* The Extended Feature Disable (XFD) helpers: */
+#ifdef CONFIG_X86_DEBUG_FPU
+DECLARE_PER_CPU(u64, xfd_shadow);
+static inline u64 xfd_debug_shadow(void)
+{
+ return this_cpu_read(xfd_shadow);
+}
+
+static inline void xfd_write(u64 value)
+{
+ wrmsrl_safe(MSR_IA32_XFD, value);
+ this_cpu_write(xfd_shadow, value);
+}
+#else
+#define xfd_debug_shadow() 0
static inline void xfd_write(u64 value)
{
wrmsrl_safe(MSR_IA32_XFD, value);
}
+#endif
static inline u64 xfd_read(void)
{
diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index e8912b5b9369..1b1306488fb6 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -82,6 +82,10 @@ bool irq_fpu_usable(void)
}
EXPORT_SYMBOL(irq_fpu_usable);
+#ifdef CONFIG_X86_DEBUG_FPU
+DEFINE_PER_CPU(u64, xfd_shadow);
+#endif
+
/*
* Save the FPU register state in fpu->state. The register state is
* preserved.
@@ -99,6 +103,15 @@ EXPORT_SYMBOL(irq_fpu_usable);
void save_fpregs_to_fpstate(struct fpu *fpu)
{
if (likely(use_xsave())) {
+ /*
+ * If XFD is armed for an xfeature, XSAVE* will not save
+ * its state. Verify XFD is clear for all features that
+ * are in use before XSAVE*.
+ */
+ if (IS_ENABLED(CONFIG_X86_DEBUG_FPU) && xfd_capable() &&
+ boot_cpu_has(X86_FEATURE_XGETBV1))
+ WARN_ON_FPU(xgetbv(1) & xfd_debug_shadow());
+
os_xsave(&fpu->state->xsave, fpu->state_mask);
/*
--
2.17.1
Powered by blists - more mailing lists