linux-kernel - [RFC PATCH 3/4] arm64: dts: rockchip: add rk3566 dtsi

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Message-Id: <20210710151034.32857-4-pgwipeout@gmail.com>
Date:   Sat, 10 Jul 2021 11:10:33 -0400
From:   Peter Geis <pgwipeout@...il.com>
To:     Rob Herring <robh+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
        Liang Chen <cl@...k-chips.com>
Cc:     linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Peter Geis <pgwipeout@...il.com>
Subject: [RFC PATCH 3/4] arm64: dts: rockchip: add rk3566 dtsi

Add the rk3566 dtsi which includes the soc specific changes for this
chip.

Signed-off-by: Peter Geis <pgwipeout@...il.com>
---
 arch/arm64/boot/dts/rockchip/rk3566.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3566.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
new file mode 100644
index 000000000000..3839eef5e4f7
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x.dtsi"
+
+/ {
+	compatible = "rockchip,rk3566";
+};
+
+&power {
+	power-domain@...568_PD_PIPE {
+		reg = <RK3568_PD_PIPE>;
+		clocks = <&cru PCLK_PIPE>;
+		pm_qos = <&qos_pcie2x1>,
+			 <&qos_sata1>,
+			 <&qos_sata2>,
+			 <&qos_usb3_0>,
+			 <&qos_usb3_1>;
+		#power-domain-cells = <0>;
+	};
+};
-- 
2.25.1