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Message-ID: <CAMuHMdVBVAzy3cZtR1pOTNq3wTgGx+0_dvUXU118XfT+rCOSrw@mail.gmail.com>
Date:   Mon, 12 Jul 2021 13:24:19 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Drew Fustini <drew@...gleboard.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Michael Zhu <michael.zhu@...rfivetech.com>,
        Wei Fu <tekkamanninja@...il.com>,
        Jack Zhu <jack.zhu@...rfivetech.com>,
        Leyfoon Tan <leyfoon.tan@...rfivetech.com>,
        Emil Renner Berthing <kernel@...il.dk>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3] dt-bindings: riscv: add starfive jh7100 bindings

Hi Drew,

On Fri, Jul 9, 2021 at 10:17 PM Drew Fustini <drew@...gleboard.org> wrote:
> Add DT binding documentation for the StarFive JH7100 Soc [1] and the
> BeagleV Starlight JH7100 board [2].
>
> [1] https://github.com/starfive-tech/beaglev_doc
> [2] https://github.com/beagleboard/beaglev-starlight
>
> Signed-off-by: Drew Fustini <drew@...gleboard.org>
> ---
> v3 changes:
> - added revision number for the board and soc after question from Palmer

Thanks for the update!

> --- /dev/null
> +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml
> @@ -0,0 +1,27 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/riscv/starfive.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive SoC-based boards
> +
> +maintainers:
> +  - Michael Zhu <michael.zhu@...rfivetech.com>
> +  - Drew Fustini <drew@...gleboard.org>
> +
> +description:
> +  StarFive SoC-based boards
> +
> +properties:
> +  $nodename:
> +    const: '/'
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: beagle,beaglev-starlight-jh7100-r0
> +          - const: starfive,jh7100-r0

While I can be convinced about the board revision number (probably you
know better if there will be different board revisions that matter),
I'm wondering if the revision number makes sense for the SoC part.
Will there be a new revision of jh7100, or will the next revision
be jh7110, which will use a different compatible value anyway?
Is there an on-chip register that allows the kernel to find out the
revision info? Might be better to use that with soc_device_register()
and soc_device_match().

> +
> +additionalProperties: true
> +
> +...

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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