linux-kernel - Re: [PATCH v5 06/13] KVM: x86/vmx: Save/Restore host MSR_ARCH_LBR

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Message-ID: <12a3e8e4-3183-9917-c9d5-59ab257b8fd3@gmail.com>
Date:   Tue, 13 Jul 2021 17:49:05 +0800
From:   Like Xu <like.xu.linux@...il.com>
To:     Jim Mattson <jmattson@...gle.com>
Cc:     Yang Weijiang <weijiang.yang@...el.com>, pbonzini@...hat.com,
        seanjc@...gle.com, vkuznets@...hat.com, wei.w.wang@...el.com,
        kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
        "kan.liang@...ux.intel.com" <kan.liang@...ux.intel.com>
Subject: Re: [PATCH v5 06/13] KVM: x86/vmx: Save/Restore host MSR_ARCH_LBR_CTL
 state

On 13/7/2021 1:45 am, Jim Mattson wrote:
> On Mon, Jul 12, 2021 at 10:20 AM Jim Mattson <jmattson@...gle.com> wrote:
>>
>> On Mon, Jul 12, 2021 at 3:19 AM Like Xu <like.xu.linux@...il.com> wrote:
>>>
>>> On 12/7/2021 5:53 pm, Yang Weijiang wrote:
>>>> On Fri, Jul 09, 2021 at 04:41:30PM -0700, Jim Mattson wrote:
>>>>> On Fri, Jul 9, 2021 at 3:54 PM Jim Mattson <jmattson@...gle.com> wrote:
>>>>>>
>>>>>> On Fri, Jul 9, 2021 at 2:51 AM Yang Weijiang <weijiang.yang@...el.com> wrote:
>>>>>>>
>>>>>>> If host is using MSR_ARCH_LBR_CTL then save it before vm-entry
>>>>>>> and reload it after vm-exit.
>>>>>>
>>>>>> I don't see anything being done here "before VM-entry" or "after
>>>>>> VM-exit." This code seems to be invoked on vcpu_load and vcpu_put.
>>>>>>
>>>>>> In any case, I don't see why this one MSR is special. It seems that if
>>>>>> the host is using the architectural LBR MSRs, then *all* of the host
>>>>>> architectural LBR MSRs have to be saved on vcpu_load and restored on
>>>>>> vcpu_put. Shouldn't  kvm_load_guest_fpu() and kvm_put_guest_fpu() do
>>>>>> that via the calls to kvm_save_current_fpu(vcpu->arch.user_fpu) and
>>>>>> restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state)?
>>>>>
>>>>> It does seem like there is something special about IA32_LBR_DEPTH, though...
>>>>>
>>>>> Section 7.3.1 of the Intel® Architecture Instruction Set Extensions
>>>>> and Future Features Programming Reference
>>>>> says, "IA32_LBR_DEPTH is saved by XSAVES, but it is not written by
>>>>> XRSTORS in any circumstance." It seems like that would require some
>>>>> special handling if the host depth and the guest depth do not match.
>>>> In our vPMU design, guest depth is alway kept the same as that of host,
>>>> so this won't be a problem. But I'll double check the code again, thanks!
>>>
>>> KVM only exposes the host's depth value to the user space
>>> so the guest can only use the same depth as the host.
>>
>> The allowed depth supplied by KVM_GET_SUPPORTED_CPUID isn't enforced,
>> though, is it?

Like other hardware dependent features, the functionality will not
promise to work properly if the guest uses the unsupported CPUID.

> 
> Also, doesn't this end up being a major constraint on future
> platforms? Every host that this vCPU will ever run on will have to use
> the same LBR depth as the host on which it was started.
> 

As a first step, we made the guest LBR feature only available for the
"migratable=off" user space, which is why we intentionally did not add
MSR_ARCH_LBR_* stuff to msrs_to_save_all[] in earlier versions.

But hopefully, we may make it at least migratable for Arch LBR.

I'm personally curious about the cost of using XSAVES to swicth
guest lbr msrs during vmx transaction, and if the cost is unacceptable,
we may ask the perf host to adjust different depths for threads.