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Message-ID: <53e6c8fa-311f-f100-dd06-d806ab593488@gmail.com>
Date: Tue, 13 Jul 2021 14:18:30 +0300
From: Sergei Shtylyov <sergei.shtylyov@...il.com>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Rob Herring <robh+dt@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Magnus Damm <magnus.damm@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
linux-gpio@...r.kernel.org, Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v2 5/5] arm64: dts: renesas: rzg2l-smarc: Add scif0 pins
On 12.07.2021 22:44, Lad Prabhakar wrote:
> Add scif0 pins in pinctrl node and update the scif0 node
> to include pinctrl property.
Properties? There are a couple... :-)
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
> ---
> arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> index adcd4f50519e..0987163f25ee 100644
> --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
[...]
> clock-frequency = <24000000>;
> };
>
> +&pinctrl {
> + scif0_pins: scif0 {
> + pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
> + <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
> + };
> +};
> +
> &scif0 {
> + pinctrl-0 = <&scif0_pins>;
> + pinctrl-names = "default";
> status = "okay";
> };
>
MBR, Sergei
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