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Message-ID: <20210713125606.GB4170@worktop.programming.kicks-ass.net>
Date:   Tue, 13 Jul 2021 14:56:06 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Leo Yan <leo.yan@...aro.org>
Cc:     Arnaldo Carvalho de Melo <acme@...nel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Borislav Petkov <bp@...en8.de>, x86@...nel.org,
        "H. Peter Anvin" <hpa@...or.com>,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach <mike.leach@...aro.org>,
        linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
        coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v4 03/11] coresight: tmc-etf: Add comment for store
 ordering

On Sun, Jul 11, 2021 at 06:40:57PM +0800, Leo Yan wrote:
> AUX ring buffer is required to separate the data store and aux_head
> store, since the function CS_LOCK() has contained memory barrier mb(),
> mb() is a more conservative barrier than smp_wmb() on Arm32/Arm64, thus
> it's needless to add any explicit barrier anymore.
> 
> Add comment to make clear for the barrier usage for ETF.
> 
> Signed-off-by: Leo Yan <leo.yan@...aro.org>
> ---
>  drivers/hwtracing/coresight/coresight-tmc-etf.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> index 45b85edfc690..9a42ee689921 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> @@ -553,6 +553,12 @@ static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev,
>  	if (buf->snapshot)
>  		handle->head += to_read;
>  
> +	/*
> +	 * AUX ring buffer requires to use memory barrier to separate the trace
> +	 * data store and aux_head store, because CS_LOCK() contains mb() which
> +	 * gives more heavy barrier than smp_wmb(), it's not necessary to
> +	 * explicitly invoke any barrier.
> +	 */
>  	CS_LOCK(drvdata->base);

'more heavy' is not a correctness argument :-)

The argument to make here is that CS_LOCK() ensures completion /
visibility of the hardware buffer.

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