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Message-Id: <20210714194036.53141-37-sashal@kernel.org>
Date: Wed, 14 Jul 2021 15:39:30 -0400
From: Sasha Levin <sashal@...nel.org>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc: Adam Ford <aford173@...il.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Sasha Levin <sashal@...nel.org>,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org
Subject: [PATCH AUTOSEL 5.12 037/102] arm64: dts: renesas: beacon: Fix USB extal reference
From: Adam Ford <aford173@...il.com>
[ Upstream commit 56bc54496f5d6bc638127bfc9df3742cbf0039e7 ]
The USB extal clock reference isn't associated to a crystal, it's
associated to a programmable clock, so remove the extal reference,
add the usb2_clksel. Since usb_extal is referenced by the versaclock,
reference it here so the usb2_clksel can get the proper clock speed
of 50MHz.
Signed-off-by: Adam Ford <aford173@...il.com>
Link: https://lore.kernel.org/r/20210513114617.30191-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
index 8d3a4d6ee885..bd3d26b2a2bb 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
@@ -319,8 +319,10 @@ &sdhi3 {
status = "okay";
};
-&usb_extal_clk {
- clock-frequency = <50000000>;
+&usb2_clksel {
+ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
+ <&versaclock5 3>, <&usb3s0_clk>;
+ status = "okay";
};
&usb3s0_clk {
--
2.30.2
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