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Message-Id: <20210714194303.54028-10-sashal@kernel.org>
Date: Wed, 14 Jul 2021 15:41:45 -0400
From: Sasha Levin <sashal@...nel.org>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc: Elaine Zhang <zhangqing@...k-chips.com>,
Enric Balletbo i Serra <enric.balletbo@...labora.com>,
Johan Jonker <jbx6244@...il.com>,
Heiko Stuebner <heiko@...ech.de>,
Sasha Levin <sashal@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org
Subject: [PATCH AUTOSEL 5.10 10/88] ARM: dts: rockchip: Fix power-controller node names for rk3288
From: Elaine Zhang <zhangqing@...k-chips.com>
[ Upstream commit 970cdc53cb1afa73602028c103dbfb6a230080be ]
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
Signed-off-by: Johan Jonker <jbx6244@...il.com>
Link: https://lore.kernel.org/r/20210417112952.8516-4-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@...ech.de>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/arm/boot/dts/rk3288.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 49b196546cdf..0d89ad274268 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -788,7 +788,7 @@ power: power-controller {
* *_HDMI HDMI
* *_MIPI_* MIPI
*/
- pd_vio@...288_PD_VIO {
+ power-domain@...288_PD_VIO {
reg = <RK3288_PD_VIO>;
clocks = <&cru ACLK_IEP>,
<&cru ACLK_ISP>,
@@ -830,7 +830,7 @@ pd_vio@...288_PD_VIO {
* Note: The following 3 are HEVC(H.265) clocks,
* and on the ACLK_HEVC_NIU (NOC).
*/
- pd_hevc@...288_PD_HEVC {
+ power-domain@...288_PD_HEVC {
reg = <RK3288_PD_HEVC>;
clocks = <&cru ACLK_HEVC>,
<&cru SCLK_HEVC_CABAC>,
@@ -844,7 +844,7 @@ pd_hevc@...288_PD_HEVC {
* (video endecoder & decoder) clocks that on the
* ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
*/
- pd_video@...288_PD_VIDEO {
+ power-domain@...288_PD_VIDEO {
reg = <RK3288_PD_VIDEO>;
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
@@ -855,7 +855,7 @@ pd_video@...288_PD_VIDEO {
* Note: ACLK_GPU is the GPU clock,
* and on the ACLK_GPU_NIU (NOC).
*/
- pd_gpu@...288_PD_GPU {
+ power-domain@...288_PD_GPU {
reg = <RK3288_PD_GPU>;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu_r>,
--
2.30.2
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