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Message-Id: <20210715182620.181549345@linuxfoundation.org>
Date: Thu, 15 Jul 2021 20:38:35 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Nikolaus Schaller <hns@...delico.com>,
=?UTF-8?q?=E5=91=A8=E7=90=B0=E6=9D=B0=20 ?=
<zhouyanjie@...yeetech.com>, Paul Cercueil <paul@...pouillou.net>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.12 153/242] MIPS: CI20: Reduce clocksource to 750 kHz.
From: 周琰杰 (Zhou Yanjie) <zhouyanjie@...yeetech.com>
[ Upstream commit 23c64447b3538a6f34cb38aae3bc19dc1ec53436 ]
The original clock (3 MHz) is too fast for the clocksource,
there will be a chance that the system may get stuck.
Reported-by: Nikolaus Schaller <hns@...delico.com>
Tested-by: Nikolaus Schaller <hns@...delico.com> # on CI20
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@...yeetech.com>
Acked-by: Paul Cercueil <paul@...pouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/mips/boot/dts/ingenic/ci20.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index 8877c62609de..3a4eaf1f3f48 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -525,10 +525,10 @@
&tcu {
/*
- * 750 kHz for the system timer and 3 MHz for the clocksource,
+ * 750 kHz for the system timer and clocksource,
* use channel #0 for the system timer, #1 for the clocksource.
*/
assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
<&tcu TCU_CLK_OST>;
- assigned-clock-rates = <750000>, <3000000>, <3000000>;
+ assigned-clock-rates = <750000>, <750000>, <3000000>;
};
--
2.30.2
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