linux-kernel - RE: [PATCH 1/2] ACPICA: Add new DBG2 Serial Port Subtypes

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <BYAPR11MB32569C7DB2041874F540A7A987129@BYAPR11MB3256.namprd11.prod.outlook.com>
Date:   Thu, 15 Jul 2021 15:44:17 +0000
From:   "Moore, Robert" <robert.moore@...el.com>
To:     Marcin Wojtas <mw@...ihalf.com>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-acpi@...r.kernel.org" <linux-acpi@...r.kernel.org>,
        "devel@...ica.org" <devel@...ica.org>,
        "jaz@...ihalf.com" <jaz@...ihalf.com>,
        "gjb@...ihalf.com" <gjb@...ihalf.com>,
        "upstream@...ihalf.com" <upstream@...ihalf.com>,
        "Samer.El-Haj-Mahmoud@....com" <Samer.El-Haj-Mahmoud@....com>,
        "jon@...id-run.com" <jon@...id-run.com>,
        "tn@...ihalf.com" <tn@...ihalf.com>,
        "rjw@...ysocki.net" <rjw@...ysocki.net>,
        "lenb@...nel.org" <lenb@...nel.org>
Subject: RE: [PATCH 1/2] ACPICA: Add new DBG2 Serial Port Subtypes

The patch was posted as a pull request on our github site.

The merged patch will be released as part of the normal ACPICA release process, which will then make it into Linux. You should then rebase.
Bob


-----Original Message-----
From: Marcin Wojtas <mw@...ihalf.com> 
Sent: Thursday, July 15, 2021 7:17 AM
To: Moore, Robert <robert.moore@...el.com>
Cc: linux-kernel@...r.kernel.org; linux-acpi@...r.kernel.org; devel@...ica.org; jaz@...ihalf.com; gjb@...ihalf.com; upstream@...ihalf.com; Samer.El-Haj-Mahmoud@....com; jon@...id-run.com; tn@...ihalf.com; rjw@...ysocki.net; lenb@...nel.org
Subject: Re: [PATCH 1/2] ACPICA: Add new DBG2 Serial Port Subtypes

Hi,


czw., 15 lip 2021 o 16:07 Moore, Robert <robert.moore@...el.com> napisał(a):
>
> This was already reported (with a patch that we've already merged) by 
> semihalf-wojtas-marcin
>

I'm not sure to be aware of the process. Reported where?
Are you planning to import the upstream patch on your own and I should rebase the SPCR driver change on top once it lands?

Best regards,
Marcin

> -----Original Message-----
> From: Marcin Wojtas <mw@...ihalf.com>
> Sent: Wednesday, July 14, 2021 2:44 PM
> To: linux-kernel@...r.kernel.org; linux-acpi@...r.kernel.org; 
> devel@...ica.org
> Cc: jaz@...ihalf.com; gjb@...ihalf.com; upstream@...ihalf.com; 
> Samer.El-Haj-Mahmoud@....com; jon@...id-run.com; tn@...ihalf.com; 
> rjw@...ysocki.net; lenb@...nel.org; Moore, Robert 
> <robert.moore@...el.com>; Marcin Wojtas <mw@...ihalf.com>
> Subject: [PATCH 1/2] ACPICA: Add new DBG2 Serial Port Subtypes
>
> ACPICA commit d95c7d206b5836c7770e8e9cd613859887fded8f
>
> The Microsoft Debug Port Table 2 (DBG2) specification revision September 21, 2020 comprises additional Serial Port Subtypes [1].
> Reflect that in the actbl1.h header file.
>
> [1] 
> https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi
> -debug-port-table
>
> Link: https://github.com/acpica/acpica/commit/d95c7d20
> Signed-off-by: Marcin Wojtas <mw@...ihalf.com>
> ---
>  include/acpi/actbl1.h | 15 ++++++++++++++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h index 
> ef2872dea01c..7bbb3e2bd33f 100644
> --- a/include/acpi/actbl1.h
> +++ b/include/acpi/actbl1.h
> @@ -482,7 +482,7 @@ struct acpi_csrt_descriptor {
>   * DBG2 - Debug Port Table 2
>   *        Version 0 (Both main table and subtables)
>   *
> - * Conforms to "Microsoft Debug Port Table 2 (DBG2)", December 10, 
> 2015
> + * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21,
> + 2020
>   *
>   
> **********************************************************************
> ********/
>
> @@ -532,11 +532,24 @@ struct acpi_dbg2_device {
>
>  #define ACPI_DBG2_16550_COMPATIBLE  0x0000
>  #define ACPI_DBG2_16550_SUBSET      0x0001
> +#define ACPI_DBG2_MAX311XE_SPI      0x0002
>  #define ACPI_DBG2_ARM_PL011         0x0003
> +#define ACPI_DBG2_MSM8X60           0x0004
> +#define ACPI_DBG2_16550_NVIDIA      0x0005
> +#define ACPI_DBG2_TI_OMAP           0x0006
> +#define ACPI_DBG2_APM88XXXX         0x0008
> +#define ACPI_DBG2_MSM8974           0x0009
> +#define ACPI_DBG2_SAM5250           0x000A
> +#define ACPI_DBG2_INTEL_USIF        0x000B
> +#define ACPI_DBG2_IMX6              0x000C
>  #define ACPI_DBG2_ARM_SBSA_32BIT    0x000D
>  #define ACPI_DBG2_ARM_SBSA_GENERIC  0x000E
>  #define ACPI_DBG2_ARM_DCC           0x000F
>  #define ACPI_DBG2_BCM2835           0x0010
> +#define ACPI_DBG2_SDM845_1_8432MHZ  0x0011
> +#define ACPI_DBG2_16550_WITH_GAS    0x0012
> +#define ACPI_DBG2_SDM845_7_372MHZ   0x0013
> +#define ACPI_DBG2_INTEL_LPSS        0x0014
>
>  #define ACPI_DBG2_1394_STANDARD     0x0000
>
> --
> 2.29.0
>