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Message-Id: <1626425406-18582-4-git-send-email-weijiang.yang@intel.com>
Date: Fri, 16 Jul 2021 16:49:57 +0800
From: Yang Weijiang <weijiang.yang@...el.com>
To: pbonzini@...hat.com, jmattson@...gle.com, seanjc@...gle.com,
vkuznets@...hat.com, wei.w.wang@...el.com, like.xu.linux@...il.com,
kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Yang Weijiang <weijiang.yang@...el.com>
Subject: [PATCH v6 03/12] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list
Arch LBR MSR_ARCH_LBR_DEPTH and MSR_ARCH_LBR_CTL are {saved|restored}
by userspace application if they're available.
Suggested-by: Jim Mattson <jmattson@...gle.com>
Signed-off-by: Yang Weijiang <weijiang.yang@...el.com>
Reviewed-by: Jim Mattson <jmattson@...gle.com>
---
arch/x86/kvm/x86.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index e0f4a46649d7..b586a45fce2b 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1298,6 +1298,7 @@ static const u32 msrs_to_save_all[] = {
MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
+ MSR_ARCH_LBR_CTL, MSR_ARCH_LBR_DEPTH,
};
static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
@@ -6049,6 +6050,11 @@ static void kvm_init_msr_list(void)
min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
continue;
break;
+ case MSR_ARCH_LBR_DEPTH:
+ case MSR_ARCH_LBR_CTL:
+ if (!kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR))
+ continue;
+ break;
default:
break;
}
--
2.21.1
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